Lines Matching refs:mmsys
908 <&mmsys CLK_MM_SMI_COMMON>,
909 <&mmsys CLK_MM_SMI_LARB0>,
910 <&mmsys CLK_MM_SMI_LARB1>,
911 <&mmsys CLK_MM_GALS_COMM0>,
912 <&mmsys CLK_MM_GALS_COMM1>,
913 <&mmsys CLK_MM_GALS_CCU2MM>,
914 <&mmsys CLK_MM_GALS_IPU12MM>,
915 <&mmsys CLK_MM_GALS_IMG2MM>,
916 <&mmsys CLK_MM_GALS_CAM2MM>,
917 <&mmsys CLK_MM_GALS_IPU2MM>;
1774 mmsys: syscon@14000000 { label
1775 compatible = "mediatek,mt8183-mmsys", "syscon";
1791 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
1792 <&mmsys CLK_MM_MDP_RSZ1>;
1804 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
1813 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
1823 clocks = <&mmsys CLK_MM_MDP_WROT0>;
1834 clocks = <&mmsys CLK_MM_MDP_WDMA0>;
1843 clocks = <&mmsys CLK_MM_DISP_OVL0>;
1853 clocks = <&mmsys CLK_MM_DISP_OVL0_2L>;
1863 clocks = <&mmsys CLK_MM_DISP_OVL1_2L>;
1873 clocks = <&mmsys CLK_MM_DISP_RDMA0>;
1884 clocks = <&mmsys CLK_MM_DISP_RDMA1>;
1896 clocks = <&mmsys CLK_MM_DISP_COLOR0>;
1905 clocks = <&mmsys CLK_MM_DISP_CCORR0>;
1914 clocks = <&mmsys CLK_MM_DISP_AAL0>;
1923 clocks = <&mmsys CLK_MM_DISP_GAMMA0>;
1932 clocks = <&mmsys CLK_MM_DISP_DITHER0>;
1941 clocks = <&mmsys CLK_MM_DSI0_MM>,
1942 <&mmsys CLK_MM_DSI0_IF>,
1945 resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>;
1964 clocks = <&mmsys CLK_MM_SMI_LARB0>,
1965 <&mmsys CLK_MM_SMI_LARB0>;
1973 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1974 <&mmsys CLK_MM_SMI_COMMON>,
1975 <&mmsys CLK_MM_GALS_COMM0>,
1976 <&mmsys CLK_MM_GALS_COMM1>;
1987 clocks = <&mmsys CLK_MM_MDP_CCORR>;
2001 <&mmsys CLK_MM_GALS_IMG2MM>;
2011 <&mmsys CLK_MM_GALS_IPU2MM>;
2093 <&mmsys CLK_MM_GALS_CAM2MM>;
2103 <&mmsys CLK_MM_GALS_IPU12MM>;