Lines Matching refs:ARM64_FEATURE_MASK
1204 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_SVE); in read_id_reg()
1205 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_AMU); in read_id_reg()
1206 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2); in read_id_reg()
1207 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2), (u64)vcpu->kvm->arch.pfr0_csv2); in read_id_reg()
1208 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3); in read_id_reg()
1209 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3), (u64)vcpu->kvm->arch.pfr0_csv3); in read_id_reg()
1211 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_GIC); in read_id_reg()
1212 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_GIC), 1); in read_id_reg()
1217 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_MTE); in read_id_reg()
1219 val &= ~ARM64_FEATURE_MASK(ID_AA64PFR1_EL1_SME); in read_id_reg()
1223 val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_APA) | in read_id_reg()
1224 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_API) | in read_id_reg()
1225 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPA) | in read_id_reg()
1226 ARM64_FEATURE_MASK(ID_AA64ISAR1_EL1_GPI)); in read_id_reg()
1230 val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_APA3) | in read_id_reg()
1231 ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_GPA3)); in read_id_reg()
1233 val &= ~ARM64_FEATURE_MASK(ID_AA64ISAR2_EL1_WFxT); in read_id_reg()
1237 val &= ~ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_DebugVer); in read_id_reg()
1238 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_DebugVer), 6); in read_id_reg()
1240 val &= ~ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer); in read_id_reg()
1241 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), in read_id_reg()
1244 val &= ~ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMSVer); in read_id_reg()
1247 val &= ~ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon); in read_id_reg()
1248 val |= FIELD_PREP(ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon), in read_id_reg()
1255 val &= ~ARM64_FEATURE_MASK(ID_MMFR4_EL1_CCIDX); in read_id_reg()
1347 val &= ~(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV2) | in set_id_aa64pfr0_el1()
1348 ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_CSV3)); in set_id_aa64pfr0_el1()
1373 pmuver = FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), val); in set_id_aa64dfr0_el1()
1385 val &= ~ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer); in set_id_aa64dfr0_el1()
1412 perfmon = FIELD_GET(ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon), val); in set_id_dfr0_el1()
1425 val &= ~ARM64_FEATURE_MASK(ID_DFR0_EL1_PerfMon); in set_id_dfr0_el1()