Lines Matching refs:FPU_REG_WIDTH

19 #define FPU_REG_WIDTH		8  macro
29 EX fst.d $f0, \base, (0 * FPU_REG_WIDTH)
30 EX fst.d $f1, \base, (1 * FPU_REG_WIDTH)
31 EX fst.d $f2, \base, (2 * FPU_REG_WIDTH)
32 EX fst.d $f3, \base, (3 * FPU_REG_WIDTH)
33 EX fst.d $f4, \base, (4 * FPU_REG_WIDTH)
34 EX fst.d $f5, \base, (5 * FPU_REG_WIDTH)
35 EX fst.d $f6, \base, (6 * FPU_REG_WIDTH)
36 EX fst.d $f7, \base, (7 * FPU_REG_WIDTH)
37 EX fst.d $f8, \base, (8 * FPU_REG_WIDTH)
38 EX fst.d $f9, \base, (9 * FPU_REG_WIDTH)
39 EX fst.d $f10, \base, (10 * FPU_REG_WIDTH)
40 EX fst.d $f11, \base, (11 * FPU_REG_WIDTH)
41 EX fst.d $f12, \base, (12 * FPU_REG_WIDTH)
42 EX fst.d $f13, \base, (13 * FPU_REG_WIDTH)
43 EX fst.d $f14, \base, (14 * FPU_REG_WIDTH)
44 EX fst.d $f15, \base, (15 * FPU_REG_WIDTH)
45 EX fst.d $f16, \base, (16 * FPU_REG_WIDTH)
46 EX fst.d $f17, \base, (17 * FPU_REG_WIDTH)
47 EX fst.d $f18, \base, (18 * FPU_REG_WIDTH)
48 EX fst.d $f19, \base, (19 * FPU_REG_WIDTH)
49 EX fst.d $f20, \base, (20 * FPU_REG_WIDTH)
50 EX fst.d $f21, \base, (21 * FPU_REG_WIDTH)
51 EX fst.d $f22, \base, (22 * FPU_REG_WIDTH)
52 EX fst.d $f23, \base, (23 * FPU_REG_WIDTH)
53 EX fst.d $f24, \base, (24 * FPU_REG_WIDTH)
54 EX fst.d $f25, \base, (25 * FPU_REG_WIDTH)
55 EX fst.d $f26, \base, (26 * FPU_REG_WIDTH)
56 EX fst.d $f27, \base, (27 * FPU_REG_WIDTH)
57 EX fst.d $f28, \base, (28 * FPU_REG_WIDTH)
58 EX fst.d $f29, \base, (29 * FPU_REG_WIDTH)
59 EX fst.d $f30, \base, (30 * FPU_REG_WIDTH)
60 EX fst.d $f31, \base, (31 * FPU_REG_WIDTH)
64 EX fld.d $f0, \base, (0 * FPU_REG_WIDTH)
65 EX fld.d $f1, \base, (1 * FPU_REG_WIDTH)
66 EX fld.d $f2, \base, (2 * FPU_REG_WIDTH)
67 EX fld.d $f3, \base, (3 * FPU_REG_WIDTH)
68 EX fld.d $f4, \base, (4 * FPU_REG_WIDTH)
69 EX fld.d $f5, \base, (5 * FPU_REG_WIDTH)
70 EX fld.d $f6, \base, (6 * FPU_REG_WIDTH)
71 EX fld.d $f7, \base, (7 * FPU_REG_WIDTH)
72 EX fld.d $f8, \base, (8 * FPU_REG_WIDTH)
73 EX fld.d $f9, \base, (9 * FPU_REG_WIDTH)
74 EX fld.d $f10, \base, (10 * FPU_REG_WIDTH)
75 EX fld.d $f11, \base, (11 * FPU_REG_WIDTH)
76 EX fld.d $f12, \base, (12 * FPU_REG_WIDTH)
77 EX fld.d $f13, \base, (13 * FPU_REG_WIDTH)
78 EX fld.d $f14, \base, (14 * FPU_REG_WIDTH)
79 EX fld.d $f15, \base, (15 * FPU_REG_WIDTH)
80 EX fld.d $f16, \base, (16 * FPU_REG_WIDTH)
81 EX fld.d $f17, \base, (17 * FPU_REG_WIDTH)
82 EX fld.d $f18, \base, (18 * FPU_REG_WIDTH)
83 EX fld.d $f19, \base, (19 * FPU_REG_WIDTH)
84 EX fld.d $f20, \base, (20 * FPU_REG_WIDTH)
85 EX fld.d $f21, \base, (21 * FPU_REG_WIDTH)
86 EX fld.d $f22, \base, (22 * FPU_REG_WIDTH)
87 EX fld.d $f23, \base, (23 * FPU_REG_WIDTH)
88 EX fld.d $f24, \base, (24 * FPU_REG_WIDTH)
89 EX fld.d $f25, \base, (25 * FPU_REG_WIDTH)
90 EX fld.d $f26, \base, (26 * FPU_REG_WIDTH)
91 EX fld.d $f27, \base, (27 * FPU_REG_WIDTH)
92 EX fld.d $f28, \base, (28 * FPU_REG_WIDTH)
93 EX fld.d $f29, \base, (29 * FPU_REG_WIDTH)
94 EX fld.d $f30, \base, (30 * FPU_REG_WIDTH)
95 EX fld.d $f31, \base, (31 * FPU_REG_WIDTH)