Lines Matching refs:mul
72 u32 mul; member
101 int *postdiv, int *mul) in approximate() argument
110 *mul = i; in approximate()
118 int *mul) in calculate() argument
125 *mul = target / tmp_gcd; in calculate()
127 if ((*mul < 1) || (*mul >= 16)) in calculate()
133 if (base / *prediv * *mul / *postdiv != target) { in calculate()
134 approximate(base, target, prediv, postdiv, mul); in calculate()
135 tmp_freq = base / *prediv * *mul / *postdiv; in calculate()
142 *prediv, *postdiv, *mul); in calculate()
171 int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1; in tnetd7300_get_clock() local
192 return (base_clock >> (mul / 16 + 1)) / divisor; in tnetd7300_get_clock()
195 product = (mul & 1) ? in tnetd7300_get_clock()
196 (base_clock * mul) >> 1 : in tnetd7300_get_clock()
197 (base_clock * (mul - 1)) >> 2; in tnetd7300_get_clock()
201 if (mul == 16) in tnetd7300_get_clock()
204 return base_clock * mul / divisor; in tnetd7300_get_clock()
210 int prediv, postdiv, mul; in tnetd7300_set_clock() local
228 calculate(base_clock, frequency, &prediv, &postdiv, &mul); in tnetd7300_set_clock()
235 writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll); in tnetd7300_set_clock()
272 int prediv, int postdiv, int postdiv2, int mul, u32 frequency) in tnetd7200_set_clock() argument
277 base, frequency, prediv, postdiv, postdiv2, mul); in tnetd7200_set_clock()
281 writel((mul - 1) & 0xF, &clock->mul); in tnetd7200_set_clock()