Lines Matching refs:gpio_bit
232 union cvmx_gpio_bit_cfgx gpio_bit; in dwc3_octeon_config_power() local
254 gpio_bit.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(gpio)); in dwc3_octeon_config_power()
255 gpio_bit.s.tx_oe = 1; in dwc3_octeon_config_power()
256 gpio_bit.s.output_sel = (index == 0 ? 0x14 : 0x15); in dwc3_octeon_config_power()
257 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(gpio), gpio_bit.u64); in dwc3_octeon_config_power()
259 gpio_bit.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(gpio)); in dwc3_octeon_config_power()
260 gpio_bit.s.tx_oe = 1; in dwc3_octeon_config_power()
261 gpio_bit.s.output_sel = (index == 0 ? 0x14 : 0x19); in dwc3_octeon_config_power()
262 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(gpio), gpio_bit.u64); in dwc3_octeon_config_power()
264 gpio_bit.u64 = cvmx_read_csr(CVMX_GPIO_XBIT_CFGX(gpio)); in dwc3_octeon_config_power()
265 gpio_bit.s.tx_oe = 1; in dwc3_octeon_config_power()
266 gpio_bit.s.output_sel = (index == 0 ? 0x14 : 0x19); in dwc3_octeon_config_power()
267 cvmx_write_csr(CVMX_GPIO_XBIT_CFGX(gpio), gpio_bit.u64); in dwc3_octeon_config_power()