Lines Matching refs:__cpu
552 #define __GEN_CPU_REGS_TABLE(__cpu) \ argument
553 [RSET_DSL_LMEM] = BCM_## __cpu ##_DSL_LMEM_BASE, \
554 [RSET_PERF] = BCM_## __cpu ##_PERF_BASE, \
555 [RSET_TIMER] = BCM_## __cpu ##_TIMER_BASE, \
556 [RSET_WDT] = BCM_## __cpu ##_WDT_BASE, \
557 [RSET_UART0] = BCM_## __cpu ##_UART0_BASE, \
558 [RSET_UART1] = BCM_## __cpu ##_UART1_BASE, \
559 [RSET_GPIO] = BCM_## __cpu ##_GPIO_BASE, \
560 [RSET_SPI] = BCM_## __cpu ##_SPI_BASE, \
561 [RSET_HSSPI] = BCM_## __cpu ##_HSSPI_BASE, \
562 [RSET_UDC0] = BCM_## __cpu ##_UDC0_BASE, \
563 [RSET_OHCI0] = BCM_## __cpu ##_OHCI0_BASE, \
564 [RSET_OHCI_PRIV] = BCM_## __cpu ##_OHCI_PRIV_BASE, \
565 [RSET_USBH_PRIV] = BCM_## __cpu ##_USBH_PRIV_BASE, \
566 [RSET_USBD] = BCM_## __cpu ##_USBD_BASE, \
567 [RSET_USBDMA] = BCM_## __cpu ##_USBDMA_BASE, \
568 [RSET_MPI] = BCM_## __cpu ##_MPI_BASE, \
569 [RSET_PCMCIA] = BCM_## __cpu ##_PCMCIA_BASE, \
570 [RSET_PCIE] = BCM_## __cpu ##_PCIE_BASE, \
571 [RSET_DSL] = BCM_## __cpu ##_DSL_BASE, \
572 [RSET_ENET0] = BCM_## __cpu ##_ENET0_BASE, \
573 [RSET_ENET1] = BCM_## __cpu ##_ENET1_BASE, \
574 [RSET_ENETDMA] = BCM_## __cpu ##_ENETDMA_BASE, \
575 [RSET_ENETDMAC] = BCM_## __cpu ##_ENETDMAC_BASE, \
576 [RSET_ENETDMAS] = BCM_## __cpu ##_ENETDMAS_BASE, \
577 [RSET_ENETSW] = BCM_## __cpu ##_ENETSW_BASE, \
578 [RSET_EHCI0] = BCM_## __cpu ##_EHCI0_BASE, \
579 [RSET_SDRAM] = BCM_## __cpu ##_SDRAM_BASE, \
580 [RSET_MEMC] = BCM_## __cpu ##_MEMC_BASE, \
581 [RSET_DDR] = BCM_## __cpu ##_DDR_BASE, \
582 [RSET_M2M] = BCM_## __cpu ##_M2M_BASE, \
583 [RSET_ATM] = BCM_## __cpu ##_ATM_BASE, \
584 [RSET_XTM] = BCM_## __cpu ##_XTM_BASE, \
585 [RSET_XTMDMA] = BCM_## __cpu ##_XTMDMA_BASE, \
586 [RSET_XTMDMAC] = BCM_## __cpu ##_XTMDMAC_BASE, \
587 [RSET_XTMDMAS] = BCM_## __cpu ##_XTMDMAS_BASE, \
588 [RSET_PCM] = BCM_## __cpu ##_PCM_BASE, \
589 [RSET_PCMDMA] = BCM_## __cpu ##_PCMDMA_BASE, \
590 [RSET_PCMDMAC] = BCM_## __cpu ##_PCMDMAC_BASE, \
591 [RSET_PCMDMAS] = BCM_## __cpu ##_PCMDMAS_BASE, \
592 [RSET_RNG] = BCM_## __cpu ##_RNG_BASE, \
593 [RSET_MISC] = BCM_## __cpu ##_MISC_BASE, \
1017 #define __GEN_CPU_IRQ_TABLE(__cpu) \ argument
1018 [IRQ_TIMER] = BCM_## __cpu ##_TIMER_IRQ, \
1019 [IRQ_SPI] = BCM_## __cpu ##_SPI_IRQ, \
1020 [IRQ_UART0] = BCM_## __cpu ##_UART0_IRQ, \
1021 [IRQ_UART1] = BCM_## __cpu ##_UART1_IRQ, \
1022 [IRQ_DSL] = BCM_## __cpu ##_DSL_IRQ, \
1023 [IRQ_ENET0] = BCM_## __cpu ##_ENET0_IRQ, \
1024 [IRQ_ENET1] = BCM_## __cpu ##_ENET1_IRQ, \
1025 [IRQ_ENET_PHY] = BCM_## __cpu ##_ENET_PHY_IRQ, \
1026 [IRQ_HSSPI] = BCM_## __cpu ##_HSSPI_IRQ, \
1027 [IRQ_OHCI0] = BCM_## __cpu ##_OHCI0_IRQ, \
1028 [IRQ_EHCI0] = BCM_## __cpu ##_EHCI0_IRQ, \
1029 [IRQ_USBD] = BCM_## __cpu ##_USBD_IRQ, \
1030 [IRQ_USBD_RXDMA0] = BCM_## __cpu ##_USBD_RXDMA0_IRQ, \
1031 [IRQ_USBD_TXDMA0] = BCM_## __cpu ##_USBD_TXDMA0_IRQ, \
1032 [IRQ_USBD_RXDMA1] = BCM_## __cpu ##_USBD_RXDMA1_IRQ, \
1033 [IRQ_USBD_TXDMA1] = BCM_## __cpu ##_USBD_TXDMA1_IRQ, \
1034 [IRQ_USBD_RXDMA2] = BCM_## __cpu ##_USBD_RXDMA2_IRQ, \
1035 [IRQ_USBD_TXDMA2] = BCM_## __cpu ##_USBD_TXDMA2_IRQ, \
1036 [IRQ_ENET0_RXDMA] = BCM_## __cpu ##_ENET0_RXDMA_IRQ, \
1037 [IRQ_ENET0_TXDMA] = BCM_## __cpu ##_ENET0_TXDMA_IRQ, \
1038 [IRQ_ENET1_RXDMA] = BCM_## __cpu ##_ENET1_RXDMA_IRQ, \
1039 [IRQ_ENET1_TXDMA] = BCM_## __cpu ##_ENET1_TXDMA_IRQ, \
1040 [IRQ_PCI] = BCM_## __cpu ##_PCI_IRQ, \
1041 [IRQ_PCMCIA] = BCM_## __cpu ##_PCMCIA_IRQ, \
1042 [IRQ_ATM] = BCM_## __cpu ##_ATM_IRQ, \
1043 [IRQ_ENETSW_RXDMA0] = BCM_## __cpu ##_ENETSW_RXDMA0_IRQ, \
1044 [IRQ_ENETSW_RXDMA1] = BCM_## __cpu ##_ENETSW_RXDMA1_IRQ, \
1045 [IRQ_ENETSW_RXDMA2] = BCM_## __cpu ##_ENETSW_RXDMA2_IRQ, \
1046 [IRQ_ENETSW_RXDMA3] = BCM_## __cpu ##_ENETSW_RXDMA3_IRQ, \
1047 [IRQ_ENETSW_TXDMA0] = BCM_## __cpu ##_ENETSW_TXDMA0_IRQ, \
1048 [IRQ_ENETSW_TXDMA1] = BCM_## __cpu ##_ENETSW_TXDMA1_IRQ, \
1049 [IRQ_ENETSW_TXDMA2] = BCM_## __cpu ##_ENETSW_TXDMA2_IRQ, \
1050 [IRQ_ENETSW_TXDMA3] = BCM_## __cpu ##_ENETSW_TXDMA3_IRQ, \
1051 [IRQ_XTM] = BCM_## __cpu ##_XTM_IRQ, \
1052 [IRQ_XTM_DMA0] = BCM_## __cpu ##_XTM_DMA0_IRQ, \