Lines Matching refs:rm200_pic_master
152 static __iomem u8 *rm200_pic_master; variable
169 writeb(cached_master_mask, rm200_pic_master + PIC_IMR); in sni_rm200_disable_8259A_irq()
184 writeb(cached_master_mask, rm200_pic_master + PIC_IMR); in sni_rm200_enable_8259A_irq()
194 writeb(0x0B, rm200_pic_master + PIC_CMD); in sni_rm200_i8259A_irq_real()
195 value = readb(rm200_pic_master + PIC_CMD) & irqmask; in sni_rm200_i8259A_irq_real()
196 writeb(0x0A, rm200_pic_master + PIC_CMD); in sni_rm200_i8259A_irq_real()
242 writeb(0x60+PIC_CASCADE_IR, rm200_pic_master + PIC_CMD); in sni_rm200_mask_and_ack_8259A()
244 readb(rm200_pic_master + PIC_IMR); in sni_rm200_mask_and_ack_8259A()
245 writeb(cached_master_mask, rm200_pic_master + PIC_IMR); in sni_rm200_mask_and_ack_8259A()
246 writeb(0x60+irq, rm200_pic_master + PIC_CMD); in sni_rm200_mask_and_ack_8259A()
302 writeb(0x0C, rm200_pic_master + PIC_CMD); /* prepare for poll */ in sni_rm200_i8259_irq()
303 irq = readb(rm200_pic_master + PIC_CMD) & 7; in sni_rm200_i8259_irq()
321 writeb(0x0B, rm200_pic_master + PIC_ISR); /* ISR register */ in sni_rm200_i8259_irq()
322 if (~readb(rm200_pic_master + PIC_ISR) & 0x80) in sni_rm200_i8259_irq()
337 writeb(0xff, rm200_pic_master + PIC_IMR); in sni_rm200_init_8259A()
340 writeb(0x11, rm200_pic_master + PIC_CMD); in sni_rm200_init_8259A()
341 writeb(0, rm200_pic_master + PIC_IMR); in sni_rm200_init_8259A()
342 writeb(1U << PIC_CASCADE_IR, rm200_pic_master + PIC_IMR); in sni_rm200_init_8259A()
343 writeb(MASTER_ICW4_DEFAULT, rm200_pic_master + PIC_IMR); in sni_rm200_init_8259A()
350 writeb(cached_master_mask, rm200_pic_master + PIC_IMR); in sni_rm200_init_8259A()
391 rm200_pic_master = ioremap(0x16000020, 4); in sni_rm200_i8259_irqs()
392 if (!rm200_pic_master) in sni_rm200_i8259_irqs()
396 iounmap(rm200_pic_master); in sni_rm200_i8259_irqs()