Lines Matching refs:r9
70 lwz r9,_MSR(r11) /* if sleeping, clear MSR.EE */
71 rlwinm r9,r9,0,~MSR_EE
80 lwz r9, THREAD+THSR0(r2)
81 update_user_segments_by_4 r9, r10, r11, r12
86 lwz r9, THREAD+THSR0(r2)
87 rlwinm r9,r9,0,~SR_NX
88 update_user_segments_by_4 r9, r10, r11, r12
113 rlwinm r9,r9,0,14,12 /* clear MSR_WE (necessary?) */
118 stw r9,_MSR(r1)
260 andi. r10,r9,MSR_RI /* check for recoverable interrupt */
276 mtspr SPRN_SRR1,r9
405 mtspr SPRN_SPRG_WSCRATCH0, r9
407 mtspr SPRN_SPRG_SCRATCH0, r9
409 addi r9,r1,INT_FRAME_SIZE /* get original r1 */
413 stw r9,0(r1) /* perform store component of stwu */
415 mfspr r9, SPRN_SPRG_RSCRATCH0
417 mfspr r9, SPRN_SPRG_SCRATCH0
469 lwz r9,_DEAR(r1); \
471 mtspr SPRN_DEAR,r9; \
483 lwz r9,_##exc_lvl_srr0(r1); \
485 mtspr SPRN_##exc_lvl_srr0,r9; \
497 lwz r9,MAS0(r1); \
500 mtspr SPRN_MAS0,r9; \
501 lwz r9,MAS3(r1); \
505 mtspr SPRN_MAS3,r9; \
510 lwz r9,MMUCR(r1); \
511 mtspr SPRN_MMUCR,r9;
519 lis r9,crit_srr0@ha;
520 lwz r9,crit_srr0@l(r9);
523 mtspr SPRN_SRR0,r9;