Lines Matching refs:isa
167 bitmap_zero(vcpu->arch.isa, RISCV_ISA_EXT_MAX); in kvm_arch_vcpu_create()
174 set_bit(host_isa, vcpu->arch.isa); in kvm_arch_vcpu_create()
278 case KVM_REG_RISCV_CONFIG_REG(isa): in kvm_riscv_vcpu_get_reg_config()
279 reg_val = vcpu->arch.isa[0] & KVM_RISCV_BASE_ISA_MASK; in kvm_riscv_vcpu_get_reg_config()
282 if (!riscv_isa_extension_available(vcpu->arch.isa, ZICBOM)) in kvm_riscv_vcpu_get_reg_config()
322 case KVM_REG_RISCV_CONFIG_REG(isa): in kvm_riscv_vcpu_set_reg_config()
347 reg_val = (vcpu->arch.isa[0] & ~KVM_RISCV_BASE_ISA_MASK) | in kvm_riscv_vcpu_set_reg_config()
349 vcpu->arch.isa[0] = reg_val; in kvm_riscv_vcpu_set_reg_config()
529 if (__riscv_isa_extension_available(vcpu->arch.isa, host_isa_ext)) in kvm_riscv_vcpu_get_reg_isa_ext()
570 set_bit(host_isa_ext, vcpu->arch.isa); in kvm_riscv_vcpu_set_reg_isa_ext()
573 clear_bit(host_isa_ext, vcpu->arch.isa); in kvm_riscv_vcpu_set_reg_isa_ext()
855 static void kvm_riscv_vcpu_update_config(const unsigned long *isa) in kvm_riscv_vcpu_update_config() argument
859 if (riscv_isa_extension_available(isa, SVPBMT)) in kvm_riscv_vcpu_update_config()
862 if (riscv_isa_extension_available(isa, SSTC)) in kvm_riscv_vcpu_update_config()
865 if (riscv_isa_extension_available(isa, ZICBOM)) in kvm_riscv_vcpu_update_config()
888 kvm_riscv_vcpu_update_config(vcpu->arch.isa); in kvm_arch_vcpu_load()
896 vcpu->arch.isa); in kvm_arch_vcpu_load()
908 vcpu->arch.isa); in kvm_arch_vcpu_put()