Lines Matching refs:sie_block
398 asce->val = vcpu->arch.sie_block->gcr[1]; in ar_translation()
401 asce->val = vcpu->arch.sie_block->gcr[7]; in ar_translation()
409 ald_addr = vcpu->arch.sie_block->gcr[5]; in ar_translation()
411 ald_addr = vcpu->arch.sie_block->gcr[2]; in ar_translation()
444 eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff; in ar_translation()
548 tec->as = psw_bits(vcpu->arch.sie_block->gpsw).as; in trans_exc_ending()
576 struct psw_bits psw = psw_bits(vcpu->arch.sie_block->gpsw); in get_vcpu_asce()
589 asce->val = vcpu->arch.sie_block->gcr[1]; in get_vcpu_asce()
592 asce->val = vcpu->arch.sie_block->gcr[7]; in get_vcpu_asce()
595 asce->val = vcpu->arch.sie_block->gcr[13]; in get_vcpu_asce()
645 ctlreg0.val = vcpu->arch.sie_block->gcr[0]; in guest_translate()
805 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; in low_address_protection_enabled()
806 psw_t *psw = &vcpu->arch.sie_block->gpsw; in low_address_protection_enabled()
847 psw_t *psw = &vcpu->arch.sie_block->gpsw; in fetch_prot_override_applicable()
852 override = vcpu->arch.sie_block->gcr[0]; in fetch_prot_override_applicable()
869 return vcpu->arch.sie_block->gcr[0] & CR0_STORAGE_PROTECTION_OVERRIDE; in storage_prot_override_applicable()
957 psw_t *psw = &vcpu->arch.sie_block->gpsw; in guest_range_to_gpas()
1069 psw_t *psw = &vcpu->arch.sie_block->gpsw; in access_guest_with_key()
1364 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; in kvm_s390_check_low_addr_prot_real()