Lines Matching refs:cpuc
364 static inline int amd_has_nb(struct cpu_hw_events *cpuc) in amd_has_nb() argument
366 struct amd_nb *nb = cpuc->amd_nb; in amd_has_nb()
392 static void __amd_put_nb_event_constraints(struct cpu_hw_events *cpuc, in __amd_put_nb_event_constraints() argument
395 struct amd_nb *nb = cpuc->amd_nb; in __amd_put_nb_event_constraints()
449 __amd_get_nb_event_constraints(struct cpu_hw_events *cpuc, struct perf_event *event, in __amd_get_nb_event_constraints() argument
453 struct amd_nb *nb = cpuc->amd_nb; in __amd_get_nb_event_constraints()
460 if (cpuc->is_fake) in __amd_get_nb_event_constraints()
543 struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu); in amd_pmu_cpu_prepare() local
545 cpuc->lbr_sel = kzalloc_node(sizeof(struct er_account), GFP_KERNEL, in amd_pmu_cpu_prepare()
547 if (!cpuc->lbr_sel) in amd_pmu_cpu_prepare()
550 WARN_ON_ONCE(cpuc->amd_nb); in amd_pmu_cpu_prepare()
555 cpuc->amd_nb = amd_alloc_nb(cpu); in amd_pmu_cpu_prepare()
556 if (cpuc->amd_nb) in amd_pmu_cpu_prepare()
559 kfree(cpuc->lbr_sel); in amd_pmu_cpu_prepare()
560 cpuc->lbr_sel = NULL; in amd_pmu_cpu_prepare()
567 struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu); in amd_pmu_cpu_starting() local
568 void **onln = &cpuc->kfree_on_online[X86_PERF_KFREE_SHARED]; in amd_pmu_cpu_starting()
572 cpuc->perf_ctr_virt_mask = AMD64_EVENTSEL_HOSTONLY; in amd_pmu_cpu_starting()
586 *onln = cpuc->amd_nb; in amd_pmu_cpu_starting()
587 cpuc->amd_nb = nb; in amd_pmu_cpu_starting()
592 cpuc->amd_nb->nb_id = nb_id; in amd_pmu_cpu_starting()
593 cpuc->amd_nb->refcnt++; in amd_pmu_cpu_starting()
691 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_pmu_check_overflow() local
709 if (!test_bit(idx, cpuc->active_mask)) in amd_pmu_check_overflow()
723 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_pmu_enable_all() local
730 if (!test_bit(idx, cpuc->active_mask)) in amd_pmu_enable_all()
733 amd_pmu_enable_event(cpuc->events[idx]); in amd_pmu_enable_all()
853 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_pmu_handle_irq() local
861 pmu_enabled = cpuc->enabled; in amd_pmu_handle_irq()
862 cpuc->enabled = 0; in amd_pmu_handle_irq()
867 if (cpuc->lbr_users) in amd_pmu_handle_irq()
873 cpuc->enabled = pmu_enabled; in amd_pmu_handle_irq()
882 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_pmu_v2_handle_irq() local
894 pmu_enabled = cpuc->enabled; in amd_pmu_v2_handle_irq()
895 cpuc->enabled = 0; in amd_pmu_v2_handle_irq()
913 if (!test_bit(idx, cpuc->active_mask)) in amd_pmu_v2_handle_irq()
916 event = cpuc->events[idx]; in amd_pmu_v2_handle_irq()
932 perf_sample_save_brstack(&data, event, &cpuc->lbr_stack); in amd_pmu_v2_handle_irq()
957 cpuc->enabled = pmu_enabled; in amd_pmu_v2_handle_irq()
967 amd_get_event_constraints(struct cpu_hw_events *cpuc, int idx, in amd_get_event_constraints() argument
973 if (!(amd_has_nb(cpuc) && amd_is_nb_event(&event->hw))) in amd_get_event_constraints()
976 return __amd_get_nb_event_constraints(cpuc, event, NULL); in amd_get_event_constraints()
979 static void amd_put_event_constraints(struct cpu_hw_events *cpuc, in amd_put_event_constraints() argument
982 if (amd_has_nb(cpuc) && amd_is_nb_event(&event->hw)) in amd_put_event_constraints()
983 __amd_put_nb_event_constraints(cpuc, event); in amd_put_event_constraints()
1076 amd_get_event_constraints_f15h(struct cpu_hw_events *cpuc, int idx, in amd_get_event_constraints_f15h() argument
1151 amd_get_event_constraints_f17h(struct cpu_hw_events *cpuc, int idx, in amd_get_event_constraints_f17h() argument
1162 static void amd_put_event_constraints_f17h(struct cpu_hw_events *cpuc, in amd_put_event_constraints_f17h() argument
1168 --cpuc->n_pair; in amd_put_event_constraints_f17h()
1192 amd_get_event_constraints_f19h(struct cpu_hw_events *cpuc, int idx, in amd_get_event_constraints_f19h() argument
1486 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_pmu_enable_virt() local
1488 cpuc->perf_ctr_virt_mask = 0; in amd_pmu_enable_virt()
1497 struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); in amd_pmu_disable_virt() local
1505 cpuc->perf_ctr_virt_mask = AMD64_EVENTSEL_HOSTONLY; in amd_pmu_disable_virt()