Lines Matching refs:pebs_enabled
1297 if (!(cpuc->pebs_enabled & ~PEBS_VIA_PT_MASK)) in intel_pmu_pebs_via_pt_disable()
1298 cpuc->pebs_enabled &= ~PEBS_VIA_PT_MASK; in intel_pmu_pebs_via_pt_disable()
1314 cpuc->pebs_enabled |= PEBS_PMI_AFTER_EACH_RECORD; in intel_pmu_pebs_via_pt_enable()
1316 cpuc->pebs_enabled |= PEBS_OUTPUT_PT; in intel_pmu_pebs_via_pt_enable()
1338 cpuc->pebs_enabled |= 1ULL << hwc->idx; in intel_pmu_pebs_enable()
1341 cpuc->pebs_enabled |= 1ULL << (hwc->idx + 32); in intel_pmu_pebs_enable()
1343 cpuc->pebs_enabled |= 1ULL << 63; in intel_pmu_pebs_enable()
1398 cpuc->pebs_enabled &= ~(1ULL << hwc->idx); in intel_pmu_pebs_disable()
1402 cpuc->pebs_enabled &= ~(1ULL << (hwc->idx + 32)); in intel_pmu_pebs_disable()
1404 cpuc->pebs_enabled &= ~(1ULL << 63); in intel_pmu_pebs_disable()
1409 wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled); in intel_pmu_pebs_disable()
1418 if (cpuc->pebs_enabled) in intel_pmu_pebs_enable_all()
1419 wrmsrl(MSR_IA32_PEBS_ENABLE, cpuc->pebs_enabled); in intel_pmu_pebs_enable_all()
1426 if (cpuc->pebs_enabled) in intel_pmu_pebs_disable_all()
1942 pebs_status = status & cpuc->pebs_enabled; in get_next_pebs_record_by_bit()
2131 for_each_set_bit(bit, (unsigned long *)&cpuc->pebs_enabled, size) { in intel_pmu_pebs_event_update_no_drain()
2173 pebs_status = p->status & cpuc->pebs_enabled; in intel_pmu_drain_pebs_nhm()
2192 if (!pebs_status && cpuc->pebs_enabled && in intel_pmu_drain_pebs_nhm()
2193 !(cpuc->pebs_enabled & (cpuc->pebs_enabled-1))) in intel_pmu_drain_pebs_nhm()
2194 pebs_status = p->status = cpuc->pebs_enabled; in intel_pmu_drain_pebs_nhm()
2284 pebs_status = get_pebs_status(at) & cpuc->pebs_enabled; in intel_pmu_drain_pebs_icl()