Lines Matching refs:tifn
512 static __always_inline void amd_set_core_ssb_state(unsigned long tifn) in amd_set_core_ssb_state() argument
518 msr |= ssbd_tif_to_amd_ls_cfg(tifn); in amd_set_core_ssb_state()
523 if (tifn & _TIF_SSBD) { in amd_set_core_ssb_state()
551 static __always_inline void amd_set_core_ssb_state(unsigned long tifn) in amd_set_core_ssb_state() argument
553 u64 msr = x86_amd_ls_cfg_base | ssbd_tif_to_amd_ls_cfg(tifn); in amd_set_core_ssb_state()
559 static __always_inline void amd_set_ssb_virt_state(unsigned long tifn) in amd_set_ssb_virt_state() argument
565 wrmsrl(MSR_AMD64_VIRT_SPEC_CTRL, ssbd_tif_to_spec_ctrl(tifn)); in amd_set_ssb_virt_state()
575 unsigned long tifn) in __speculation_ctrl_update() argument
577 unsigned long tif_diff = tifp ^ tifn; in __speculation_ctrl_update()
586 amd_set_ssb_virt_state(tifn); in __speculation_ctrl_update()
589 amd_set_core_ssb_state(tifn); in __speculation_ctrl_update()
593 msr |= ssbd_tif_to_spec_ctrl(tifn); in __speculation_ctrl_update()
600 msr |= stibp_tif_to_spec_ctrl(tifn); in __speculation_ctrl_update()
655 unsigned long tifp, tifn; in __switch_to_xtra() local
657 tifn = read_task_thread_flags(next_p); in __switch_to_xtra()
664 if ((tifp & _TIF_BLOCKSTEP || tifn & _TIF_BLOCKSTEP) && in __switch_to_xtra()
670 msk = tifn & _TIF_BLOCKSTEP; in __switch_to_xtra()
675 if ((tifp ^ tifn) & _TIF_NOTSC) in __switch_to_xtra()
678 if ((tifp ^ tifn) & _TIF_NOCPUID) in __switch_to_xtra()
679 set_cpuid_faulting(!!(tifn & _TIF_NOCPUID)); in __switch_to_xtra()
681 if (likely(!((tifp | tifn) & _TIF_SPEC_FORCE_UPDATE))) { in __switch_to_xtra()
682 __speculation_ctrl_update(tifp, tifn); in __switch_to_xtra()
685 tifn = speculation_ctrl_update_tif(next_p); in __switch_to_xtra()
688 __speculation_ctrl_update(~tifn, tifn); in __switch_to_xtra()