Lines Matching refs:VCPU_SREG_SS
523 ctxt->ops->get_segment(ctxt, &sel, &ss, NULL, VCPU_SREG_SS); in stack_mask()
748 if (addr.seg == VCPU_SREG_SS) in __linearize()
1172 ctxt->modrm_seg = VCPU_SREG_SS; in adjust_modrm_seg()
1264 ctxt->modrm_seg = VCPU_SREG_SS; in decode_modrm()
1596 if (seg == VCPU_SREG_SS) { in __load_segment_descriptor()
1634 case VCPU_SREG_SS: in __load_segment_descriptor()
1709 err_vec = (seg == VCPU_SREG_SS) ? SS_VECTOR : NP_VECTOR; in __load_segment_descriptor()
1763 if (seg == VCPU_SREG_SS && selector == 3 && in load_segment_descriptor()
1822 addr.seg = VCPU_SREG_SS; in push()
1841 addr.seg = VCPU_SREG_SS; in emulate_pop()
1957 if (seg == VCPU_SREG_SS) in em_pop_sreg()
2423 ops->set_segment(ctxt, ss_sel, &ss, 0, VCPU_SREG_SS); in em_syscall()
2490 ops->set_segment(ctxt, ss_sel, &ss, 0, VCPU_SREG_SS); in em_sysenter()
2555 ops->set_segment(ctxt, ss_sel, &ss, 0, VCPU_SREG_SS); in em_sysexit()
2674 tss->ss = get_segment_selector(ctxt, VCPU_SREG_SS); in save_state_to_tss16()
2703 set_segment_selector(ctxt, tss->ss, VCPU_SREG_SS); in load_state_from_tss16()
2724 ret = __load_segment_descriptor(ctxt, tss->ss, VCPU_SREG_SS, cpl, in load_state_from_tss16()
2787 tss->ss = get_segment_selector(ctxt, VCPU_SREG_SS); in save_state_to_tss32()
2822 set_segment_selector(ctxt, tss->ss, VCPU_SREG_SS); in load_state_from_tss32()
2856 ret = __load_segment_descriptor(ctxt, tss->ss, VCPU_SREG_SS, cpl, in load_state_from_tss32()
3396 if (ctxt->modrm_reg == VCPU_SREG_SS) in em_mov_sreg_rm()
4729 op->val = VCPU_SREG_SS; in decode_operand()
4833 ctxt->seg_override = VCPU_SREG_SS; in x86_decode_insn()