Lines Matching refs:dreg
487 u8 dreg = dstk ? IA32_EAX : dst; in emit_ia32_shift_r() local
511 EMIT2(0xD3, add_1reg(b2, dreg)); in emit_ia32_shift_r()
515 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), STACK_VAR(dst)); in emit_ia32_shift_r()
530 u8 dreg = dstk ? IA32_EDX : dst; in emit_ia32_alu_r() local
544 EMIT2(0x11, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
546 EMIT2(0x01, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
551 EMIT2(0x19, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
553 EMIT2(0x29, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
557 EMIT2(0x09, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
561 EMIT2(0x21, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
565 EMIT2(0x31, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_r()
571 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), in emit_ia32_alu_r()
603 u8 dreg = dstk ? IA32_EAX : dst; in emit_ia32_alu_i() local
619 EMIT3(0x83, add_1reg(0xD0, dreg), val); in emit_ia32_alu_i()
621 EMIT2(0x11, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
624 EMIT3(0x83, add_1reg(0xC0, dreg), val); in emit_ia32_alu_i()
626 EMIT2(0x01, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
633 EMIT3(0x83, add_1reg(0xD8, dreg), val); in emit_ia32_alu_i()
635 EMIT2(0x19, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
638 EMIT3(0x83, add_1reg(0xE8, dreg), val); in emit_ia32_alu_i()
640 EMIT2(0x29, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
646 EMIT3(0x83, add_1reg(0xC8, dreg), val); in emit_ia32_alu_i()
648 EMIT2(0x09, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
653 EMIT3(0x83, add_1reg(0xE0, dreg), val); in emit_ia32_alu_i()
655 EMIT2(0x21, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
660 EMIT3(0x83, add_1reg(0xF0, dreg), val); in emit_ia32_alu_i()
662 EMIT2(0x31, add_2reg(0xC0, dreg, sreg)); in emit_ia32_alu_i()
665 EMIT2(0xF7, add_1reg(0xD8, dreg)); in emit_ia32_alu_i()
671 EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), in emit_ia32_alu_i()