Lines Matching refs:sds
184 struct hl_state_dump_specs *sds = &hdev->state_dump_specs; in hl_state_dump_get_sync_name() local
187 hash_for_each_possible(sds->so_id_to_str_tb, entry, in hl_state_dump_get_sync_name()
208 struct hl_state_dump_specs *sds = &hdev->state_dump_specs; in hl_state_dump_get_monitor_name() local
211 hash_for_each_possible(sds->monitor_id_to_str_tb, in hl_state_dump_get_monitor_name()
267 struct hl_state_dump_specs *sds = &hdev->state_dump_specs; in hl_state_dump_read_sync_objects() local
272 base_addr = sds->props[SP_SYNC_OBJ_BASE_ADDR] + in hl_state_dump_read_sync_objects()
273 sds->props[SP_NEXT_SYNC_OBJ_ADDR] * index; in hl_state_dump_read_sync_objects()
275 sync_objects = vmalloc(sds->props[SP_SYNC_OBJ_AMOUNT] * sizeof(u32)); in hl_state_dump_read_sync_objects()
279 for (i = 0; i < sds->props[SP_SYNC_OBJ_AMOUNT]; ++i) in hl_state_dump_read_sync_objects()
313 struct hl_state_dump_specs *sds = &hdev->state_dump_specs; in hl_state_dump_print_syncs_single_block() local
318 if (sds->sync_namager_names) { in hl_state_dump_print_syncs_single_block()
321 sds->sync_namager_names[index]); in hl_state_dump_print_syncs_single_block()
332 for (i = 0; i < sds->props[SP_SYNC_OBJ_AMOUNT]; ++i) { in hl_state_dump_print_syncs_single_block()
339 sync_object_addr = sds->props[SP_SYNC_OBJ_BASE_ADDR] + in hl_state_dump_print_syncs_single_block()
340 sds->props[SP_NEXT_SYNC_OBJ_ADDR] * index + in hl_state_dump_print_syncs_single_block()
398 struct hl_state_dump_specs *sds = &hdev->state_dump_specs; in hl_state_dump_print_syncs() local
407 rc = sds->funcs.gen_sync_to_engine_map(hdev, map); in hl_state_dump_print_syncs()
415 if (sds->sync_namager_names) { in hl_state_dump_print_syncs()
416 for (index = 0; sds->sync_namager_names[index]; ++index) { in hl_state_dump_print_syncs()
423 for (index = 0; index < sds->props[SP_NUM_CORES]; ++index) { in hl_state_dump_print_syncs()
451 struct hl_state_dump_specs *sds = &hdev->state_dump_specs; in hl_state_dump_alloc_read_sm_block_monitors() local
456 monitors = vmalloc(sds->props[SP_MONITORS_AMOUNT] * in hl_state_dump_alloc_read_sm_block_monitors()
461 base_addr = sds->props[SP_NEXT_SYNC_OBJ_ADDR] * index; in hl_state_dump_alloc_read_sm_block_monitors()
463 for (i = 0; i < sds->props[SP_MONITORS_AMOUNT]; ++i) { in hl_state_dump_alloc_read_sm_block_monitors()
466 RREG32(base_addr + sds->props[SP_MON_OBJ_WR_ADDR_LOW] + in hl_state_dump_alloc_read_sm_block_monitors()
470 RREG32(base_addr + sds->props[SP_MON_OBJ_WR_ADDR_HIGH] + in hl_state_dump_alloc_read_sm_block_monitors()
474 RREG32(base_addr + sds->props[SP_MON_OBJ_WR_DATA] + in hl_state_dump_alloc_read_sm_block_monitors()
478 RREG32(base_addr + sds->props[SP_MON_OBJ_ARM_DATA] + in hl_state_dump_alloc_read_sm_block_monitors()
482 RREG32(base_addr + sds->props[SP_MON_OBJ_STATUS] + in hl_state_dump_alloc_read_sm_block_monitors()
515 struct hl_state_dump_specs *sds = &hdev->state_dump_specs; in hl_state_dump_print_monitors_single_block() local
519 if (sds->sync_namager_names) { in hl_state_dump_print_monitors_single_block()
522 sds->sync_namager_names[index]); in hl_state_dump_print_monitors_single_block()
533 for (i = 0; i < sds->props[SP_MONITORS_AMOUNT]; ++i) { in hl_state_dump_print_monitors_single_block()
534 if (!(sds->funcs.monitor_valid(&monitors[i]))) in hl_state_dump_print_monitors_single_block()
538 rc = sds->funcs.print_single_monitor(buf, size, offset, hdev, in hl_state_dump_print_monitors_single_block()
565 struct hl_state_dump_specs *sds = &hdev->state_dump_specs; in hl_state_dump_print_monitors() local
574 if (sds->sync_namager_names) { in hl_state_dump_print_monitors()
575 for (index = 0; sds->sync_namager_names[index]; ++index) { in hl_state_dump_print_monitors()
582 for (index = 0; index < sds->props[SP_NUM_CORES]; ++index) { in hl_state_dump_print_monitors()
608 struct hl_state_dump_specs *sds = &hdev->state_dump_specs; in hl_state_dump_print_engine_fences() local
614 n_fences = sds->props[SP_NUM_OF_TPC_ENGINES]; in hl_state_dump_print_engine_fences()
615 base_addr = sds->props[SP_TPC0_CMDQ]; in hl_state_dump_print_engine_fences()
616 next_fence = sds->props[SP_NEXT_TPC]; in hl_state_dump_print_engine_fences()
619 n_fences = sds->props[SP_NUM_OF_MME_ENGINES]; in hl_state_dump_print_engine_fences()
620 base_addr = sds->props[SP_MME_CMDQ]; in hl_state_dump_print_engine_fences()
621 next_fence = sds->props[SP_NEXT_MME]; in hl_state_dump_print_engine_fences()
624 n_fences = sds->props[SP_NUM_OF_DMA_ENGINES]; in hl_state_dump_print_engine_fences()
625 base_addr = sds->props[SP_DMA_CMDQ]; in hl_state_dump_print_engine_fences()
626 next_fence = sds->props[SP_DMA_QUEUES_OFFSET]; in hl_state_dump_print_engine_fences()
632 rc = sds->funcs.print_fences_single_engine( in hl_state_dump_print_engine_fences()
635 sds->props[SP_FENCE0_CNT_OFFSET], in hl_state_dump_print_engine_fences()
637 sds->props[SP_CP_STS_OFFSET], in hl_state_dump_print_engine_fences()