Lines Matching refs:REG_TEST_FLD
635 if (!REG_TEST_FLD(MTL_BUTTRESS_TILE_FUSE, VALID, tile_fuse)) in ivpu_hw_mtl_info_init()
792 return REG_TEST_FLD(MTL_BUTTRESS_VPU_STATUS, READY, val) && in ivpu_hw_mtl_is_idle()
793 REG_TEST_FLD(MTL_BUTTRESS_VPU_STATUS, IDLE, val); in ivpu_hw_mtl_is_idle()
951 if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, MMU_IRQ_0_INT, status)) in ivpu_hw_mtl_irqv_handler()
954 if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, HOST_IPC_FIFO_INT, status)) in ivpu_hw_mtl_irqv_handler()
957 if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, MMU_IRQ_1_INT, status)) in ivpu_hw_mtl_irqv_handler()
960 if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, MMU_IRQ_2_INT, status)) in ivpu_hw_mtl_irqv_handler()
963 if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_0_INT, status)) in ivpu_hw_mtl_irqv_handler()
966 if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_1_INT, status)) in ivpu_hw_mtl_irqv_handler()
969 if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, NOC_FIREWALL_INT, status)) in ivpu_hw_mtl_irqv_handler()
987 if (REG_TEST_FLD(MTL_BUTTRESS_INTERRUPT_STAT, FREQ_CHANGE, status)) in ivpu_hw_mtl_irqb_handler()
990 if (REG_TEST_FLD(MTL_BUTTRESS_INTERRUPT_STAT, ATS_ERR, status)) { in ivpu_hw_mtl_irqb_handler()
996 if (REG_TEST_FLD(MTL_BUTTRESS_INTERRUPT_STAT, UFI_ERR, status)) { in ivpu_hw_mtl_irqb_handler()
1042 if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_0_INT, irqv)) in ivpu_hw_mtl_diagnose_failure()
1045 if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, CPU_INT_REDIRECT_1_INT, irqv)) in ivpu_hw_mtl_diagnose_failure()
1048 if (REG_TEST_FLD(MTL_VPU_HOST_SS_ICB_STATUS_0, NOC_FIREWALL_INT, irqv)) in ivpu_hw_mtl_diagnose_failure()
1051 if (REG_TEST_FLD(MTL_BUTTRESS_INTERRUPT_STAT, ATS_ERR, irqb)) in ivpu_hw_mtl_diagnose_failure()
1054 if (REG_TEST_FLD(MTL_BUTTRESS_INTERRUPT_STAT, UFI_ERR, irqb)) { in ivpu_hw_mtl_diagnose_failure()