Lines Matching refs:pgd_index
53 int pgd_index, pmd_index; in ivpu_mmu_pgtable_free() local
55 for (pgd_index = 0; pgd_index < IVPU_MMU_PGTABLE_ENTRIES; ++pgd_index) { in ivpu_mmu_pgtable_free()
56 u64 **pmd_entries = pgtable->pgd_cpu_entries[pgd_index]; in ivpu_mmu_pgtable_free()
57 u64 *pmd = pgtable->pgd_entries[pgd_index]; in ivpu_mmu_pgtable_free()
70 dma_free_wc(vdev->drm.dev, IVPU_MMU_PGTABLE_SIZE, pgtable->pgd_entries[pgd_index], in ivpu_mmu_pgtable_free()
71 pgtable->pgd[pgd_index] & ~IVPU_MMU_ENTRY_FLAGS_MASK); in ivpu_mmu_pgtable_free()
79 ivpu_mmu_ensure_pmd(struct ivpu_device *vdev, struct ivpu_mmu_pgtable *pgtable, u64 pgd_index) in ivpu_mmu_ensure_pmd() argument
85 if (pgtable->pgd_entries[pgd_index]) in ivpu_mmu_ensure_pmd()
86 return pgtable->pgd_entries[pgd_index]; in ivpu_mmu_ensure_pmd()
96 pgtable->pgd_entries[pgd_index] = pmd; in ivpu_mmu_ensure_pmd()
97 pgtable->pgd_cpu_entries[pgd_index] = pmd_entries; in ivpu_mmu_ensure_pmd()
98 pgtable->pgd[pgd_index] = pmd_dma | IVPU_MMU_ENTRY_VALID; in ivpu_mmu_ensure_pmd()
109 int pgd_index, int pmd_index) in ivpu_mmu_ensure_pte() argument
114 if (pgtable->pgd_cpu_entries[pgd_index][pmd_index]) in ivpu_mmu_ensure_pte()
115 return pgtable->pgd_cpu_entries[pgd_index][pmd_index]; in ivpu_mmu_ensure_pte()
121 pgtable->pgd_cpu_entries[pgd_index][pmd_index] = pte; in ivpu_mmu_ensure_pte()
122 pgtable->pgd_entries[pgd_index][pmd_index] = pte_dma | IVPU_MMU_ENTRY_VALID; in ivpu_mmu_ensure_pte()
132 int pgd_index = FIELD_GET(IVPU_MMU_PGD_INDEX_MASK, vpu_addr); in ivpu_mmu_context_map_page() local
137 if (!ivpu_mmu_ensure_pmd(vdev, &ctx->pgtable, pgd_index)) in ivpu_mmu_context_map_page()
141 pte = ivpu_mmu_ensure_pte(vdev, &ctx->pgtable, pgd_index, pmd_index); in ivpu_mmu_context_map_page()
153 int pgd_index = FIELD_GET(IVPU_MMU_PGD_INDEX_MASK, vpu_addr); in ivpu_mmu_context_unmap_page() local
158 ctx->pgtable.pgd_cpu_entries[pgd_index][pmd_index][pte_index] = IVPU_MMU_ENTRY_INVALID; in ivpu_mmu_context_unmap_page()
171 int pgd_index = FIELD_GET(IVPU_MMU_PGD_INDEX_MASK, vpu_addr); in ivpu_mmu_context_flush_page_tables() local
172 u64 pmd_end = (pgd_index + 1) * (u64)IVPU_MMU_PMD_MAP_SIZE; in ivpu_mmu_context_flush_page_tables()
173 u64 *pmd = ctx->pgtable.pgd_entries[pgd_index]; in ivpu_mmu_context_flush_page_tables()
177 u64 *pte = ctx->pgtable.pgd_cpu_entries[pgd_index][pmd_index]; in ivpu_mmu_context_flush_page_tables()