Lines Matching refs:regval

25 	u32 regval;  in mhi_ep_mmio_masked_write()  local
27 regval = mhi_ep_mmio_read(mhi_cntrl, offset); in mhi_ep_mmio_masked_write()
28 regval &= ~mask; in mhi_ep_mmio_masked_write()
29 regval |= (val << __ffs(mask)) & mask; in mhi_ep_mmio_masked_write()
30 mhi_ep_mmio_write(mhi_cntrl, offset, regval); in mhi_ep_mmio_masked_write()
35 u32 regval; in mhi_ep_mmio_masked_read() local
37 regval = mhi_ep_mmio_read(dev, offset); in mhi_ep_mmio_masked_read()
38 regval &= mask; in mhi_ep_mmio_masked_read()
39 regval >>= __ffs(mask); in mhi_ep_mmio_masked_read()
41 return regval; in mhi_ep_mmio_masked_read()
47 u32 regval; in mhi_ep_mmio_get_mhi_state() local
49 regval = mhi_ep_mmio_read(mhi_cntrl, EP_MHICTRL); in mhi_ep_mmio_get_mhi_state()
50 *state = FIELD_GET(MHICTRL_MHISTATE_MASK, regval); in mhi_ep_mmio_get_mhi_state()
51 *mhi_reset = !!FIELD_GET(MHICTRL_RESET_MASK, regval); in mhi_ep_mmio_get_mhi_state()
185 u32 regval; in mhi_ep_mmio_get_chc_base() local
187 regval = mhi_ep_mmio_read(mhi_cntrl, EP_CCABAP_HIGHER); in mhi_ep_mmio_get_chc_base()
188 mhi_cntrl->ch_ctx_host_pa = regval; in mhi_ep_mmio_get_chc_base()
191 regval = mhi_ep_mmio_read(mhi_cntrl, EP_CCABAP_LOWER); in mhi_ep_mmio_get_chc_base()
192 mhi_cntrl->ch_ctx_host_pa |= regval; in mhi_ep_mmio_get_chc_base()
197 u32 regval; in mhi_ep_mmio_get_erc_base() local
199 regval = mhi_ep_mmio_read(mhi_cntrl, EP_ECABAP_HIGHER); in mhi_ep_mmio_get_erc_base()
200 mhi_cntrl->ev_ctx_host_pa = regval; in mhi_ep_mmio_get_erc_base()
203 regval = mhi_ep_mmio_read(mhi_cntrl, EP_ECABAP_LOWER); in mhi_ep_mmio_get_erc_base()
204 mhi_cntrl->ev_ctx_host_pa |= regval; in mhi_ep_mmio_get_erc_base()
209 u32 regval; in mhi_ep_mmio_get_crc_base() local
211 regval = mhi_ep_mmio_read(mhi_cntrl, EP_CRCBAP_HIGHER); in mhi_ep_mmio_get_crc_base()
212 mhi_cntrl->cmd_ctx_host_pa = regval; in mhi_ep_mmio_get_crc_base()
215 regval = mhi_ep_mmio_read(mhi_cntrl, EP_CRCBAP_LOWER); in mhi_ep_mmio_get_crc_base()
216 mhi_cntrl->cmd_ctx_host_pa |= regval; in mhi_ep_mmio_get_crc_base()
223 u32 regval; in mhi_ep_mmio_get_db() local
225 regval = mhi_ep_mmio_read(mhi_cntrl, ring->db_offset_h); in mhi_ep_mmio_get_db()
226 db_offset = regval; in mhi_ep_mmio_get_db()
229 regval = mhi_ep_mmio_read(mhi_cntrl, ring->db_offset_l); in mhi_ep_mmio_get_db()
230 db_offset |= regval; in mhi_ep_mmio_get_db()
254 u32 regval; in mhi_ep_mmio_init() local
259 regval = mhi_ep_mmio_read(mhi_cntrl, EP_MHICFG); in mhi_ep_mmio_init()
260 mhi_cntrl->event_rings = FIELD_GET(MHICFG_NER_MASK, regval); in mhi_ep_mmio_init()
261 mhi_cntrl->hw_event_rings = FIELD_GET(MHICFG_NHWER_MASK, regval); in mhi_ep_mmio_init()
268 u32 regval; in mhi_ep_mmio_update_ner() local
270 regval = mhi_ep_mmio_read(mhi_cntrl, EP_MHICFG); in mhi_ep_mmio_update_ner()
271 mhi_cntrl->event_rings = FIELD_GET(MHICFG_NER_MASK, regval); in mhi_ep_mmio_update_ner()
272 mhi_cntrl->hw_event_rings = FIELD_GET(MHICFG_NHWER_MASK, regval); in mhi_ep_mmio_update_ner()