Lines Matching refs:new_line
4061 sync_serial_settings new_line; in hdlcdev_wan_ioctl() local
4073 memset(&new_line, 0, size); in hdlcdev_wan_ioctl()
4090 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break; in hdlcdev_wan_ioctl()
4091 case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break; in hdlcdev_wan_ioctl()
4092 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break; in hdlcdev_wan_ioctl()
4093 case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break; in hdlcdev_wan_ioctl()
4094 default: new_line.clock_type = CLOCK_DEFAULT; in hdlcdev_wan_ioctl()
4097 new_line.clock_rate = info->params.clock_speed; in hdlcdev_wan_ioctl()
4098 new_line.loopback = info->params.loopback ? 1:0; in hdlcdev_wan_ioctl()
4100 if (copy_to_user(line, &new_line, size)) in hdlcdev_wan_ioctl()
4108 if (copy_from_user(&new_line, line, size)) in hdlcdev_wan_ioctl()
4111 switch (new_line.clock_type) in hdlcdev_wan_ioctl()
4125 if (new_line.loopback != 0 && new_line.loopback != 1) in hdlcdev_wan_ioctl()
4134 info->params.loopback = new_line.loopback; in hdlcdev_wan_ioctl()
4137 info->params.clock_speed = new_line.clock_rate; in hdlcdev_wan_ioctl()