Lines Matching refs:parent_name
92 struct clk_hw *imx_clk_fracn_gppll(const char *name, const char *parent_name, void __iomem *base,
97 #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \ argument
98 to_clk(imx_clk_hw_cpu(name, parent_name, div, mux, pll, step))
100 #define clk_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \ argument
102 to_clk(clk_hw_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \
105 #define imx_clk_pllv3(type, name, parent_name, base, div_mask) \ argument
106 to_clk(imx_clk_hw_pllv3(type, name, parent_name, base, div_mask))
108 #define imx_clk_pfd(name, parent_name, reg, idx) \ argument
109 to_clk(imx_clk_hw_pfd(name, parent_name, reg, idx))
220 #define imx_clk_hw_pll14xx(name, parent_name, base, pll_clk) \ argument
221 imx_dev_clk_hw_pll14xx(NULL, name, parent_name, base, pll_clk)
224 const char *parent_name, void __iomem *base,
233 struct clk_hw *imx_clk_hw_frac_pll(const char *name, const char *parent_name,
257 const char *parent_name, void __iomem *base, u32 div_mask);
277 const char *parent_name, void __iomem *base);
280 const char *parent_name, unsigned long flags,
299 struct clk_hw *imx_clk_hw_pfd(const char *name, const char *parent_name,
303 const char *parent_name, void __iomem *reg, u8 idx);
305 struct clk_hw *imx_clk_hw_busy_divider(const char *name, const char *parent_name,
388 struct clk_hw *imx_clk_hw_cpu(const char *name, const char *parent_name,
456 struct clk_hw *imx93_clk_gate(struct device *dev, const char *name, const char *parent_name,
460 struct clk_hw *imx_clk_hw_divider_gate(const char *name, const char *parent_name,