Lines Matching refs:corediv
81 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_is_enabled() local
82 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_is_enabled()
83 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_is_enabled()
86 return !!(readl(corediv->reg) & enable_mask); in clk_corediv_is_enabled()
91 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_enable() local
92 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_enable()
93 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_enable()
97 spin_lock_irqsave(&corediv->lock, flags); in clk_corediv_enable()
99 reg = readl(corediv->reg); in clk_corediv_enable()
101 writel(reg, corediv->reg); in clk_corediv_enable()
103 spin_unlock_irqrestore(&corediv->lock, flags); in clk_corediv_enable()
110 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_disable() local
111 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_disable()
112 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_disable()
116 spin_lock_irqsave(&corediv->lock, flags); in clk_corediv_disable()
118 reg = readl(corediv->reg); in clk_corediv_disable()
120 writel(reg, corediv->reg); in clk_corediv_disable()
122 spin_unlock_irqrestore(&corediv->lock, flags); in clk_corediv_disable()
128 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_recalc_rate() local
129 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_recalc_rate()
130 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_recalc_rate()
133 reg = readl(corediv->reg + soc_desc->ratio_offset); in clk_corediv_recalc_rate()
156 struct clk_corediv *corediv = to_corediv_clk(hwclk); in clk_corediv_set_rate() local
157 const struct clk_corediv_soc_desc *soc_desc = corediv->soc_desc; in clk_corediv_set_rate()
158 const struct clk_corediv_desc *desc = corediv->desc; in clk_corediv_set_rate()
164 spin_lock_irqsave(&corediv->lock, flags); in clk_corediv_set_rate()
167 reg = readl(corediv->reg + soc_desc->ratio_offset); in clk_corediv_set_rate()
170 writel(reg, corediv->reg + soc_desc->ratio_offset); in clk_corediv_set_rate()
173 reg = readl(corediv->reg) | BIT(desc->fieldbit); in clk_corediv_set_rate()
174 writel(reg, corediv->reg); in clk_corediv_set_rate()
177 reg = readl(corediv->reg) | soc_desc->ratio_reload; in clk_corediv_set_rate()
178 writel(reg, corediv->reg); in clk_corediv_set_rate()
186 writel(reg, corediv->reg); in clk_corediv_set_rate()
189 spin_unlock_irqrestore(&corediv->lock, flags); in clk_corediv_set_rate()
255 struct clk_corediv *corediv; in mvebu_corediv_clk_init() local
276 corediv = kcalloc(clk_data.clk_num, sizeof(struct clk_corediv), in mvebu_corediv_clk_init()
278 if (WARN_ON(!corediv)) in mvebu_corediv_clk_init()
281 spin_lock_init(&corediv->lock); in mvebu_corediv_clk_init()
292 corediv[i].soc_desc = soc_desc; in mvebu_corediv_clk_init()
293 corediv[i].desc = soc_desc->descs + i; in mvebu_corediv_clk_init()
294 corediv[i].reg = base; in mvebu_corediv_clk_init()
295 corediv[i].hw.init = &init; in mvebu_corediv_clk_init()
297 clks[i] = clk_register(NULL, &corediv[i].hw); in mvebu_corediv_clk_init()