Lines Matching refs:clk_base
230 #define pll_readl(offset, p) readl_relaxed(p->clk_base + offset)
237 #define pll_writel(val, offset, p) writel_relaxed(val, p->clk_base + offset)
302 lock_addr = pll->clk_base; in clk_pll_wait_for_lock()
1002 val = readl(pll->clk_base + PLLE_SS_CTRL); in clk_plle_enable()
1005 writel(val, pll->clk_base + PLLE_SS_CTRL); in clk_plle_enable()
1162 value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2); in clk_pllu_enable()
1172 writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2); in clk_pllu_enable()
1174 value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1); in clk_pllu_enable()
1184 writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1); in clk_pllu_enable()
1268 void __iomem *clk_base, in _setup_dynamic_ramp() argument
1298 writel_relaxed(val, clk_base + pll_params->dyn_ramp_reg); in _setup_dynamic_ramp()
1785 value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG2); in clk_pllu_tegra114_enable()
1795 writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG2); in clk_pllu_tegra114_enable()
1797 value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1); in clk_pllu_tegra114_enable()
1808 writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1); in clk_pllu_tegra114_enable()
1811 value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0); in clk_pllu_tegra114_enable()
1815 writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0); in clk_pllu_tegra114_enable()
1817 value = readl_relaxed(pll->clk_base + UTMIP_PLL_CFG1); in clk_pllu_tegra114_enable()
1820 writel_relaxed(value, pll->clk_base + UTMIP_PLL_CFG1); in clk_pllu_tegra114_enable()
1828 value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0); in clk_pllu_tegra114_enable()
1831 writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0); in clk_pllu_tegra114_enable()
1836 value = readl_relaxed(pll->clk_base + UTMIPLL_HW_PWRDN_CFG0); in clk_pllu_tegra114_enable()
1838 writel_relaxed(value, pll->clk_base + UTMIPLL_HW_PWRDN_CFG0); in clk_pllu_tegra114_enable()
1864 fence_udelay(1, pll->clk_base); in _clk_plle_tegra_init_parent()
1869 static struct tegra_clk_pll *_tegra_init_pll(void __iomem *clk_base, in _tegra_init_pll() argument
1879 pll->clk_base = clk_base; in _tegra_init_pll()
1921 void __iomem *clk_base, void __iomem *pmc, in tegra_clk_register_pll() argument
1930 pll = _tegra_init_pll(clk_base, pmc, pll_params, lock); in tegra_clk_register_pll()
1952 void __iomem *clk_base, void __iomem *pmc, in tegra_clk_register_plle() argument
1964 pll = _tegra_init_pll(clk_base, pmc, pll_params, lock); in tegra_clk_register_plle()
1977 void __iomem *clk_base, unsigned long flags, in tegra_clk_register_pllu() argument
1985 pll = _tegra_init_pll(clk_base, NULL, pll_params, lock); in tegra_clk_register_pllu()
2043 void __iomem *clk_base, void __iomem *pmc, in tegra_clk_register_pllxc() argument
2078 err = _setup_dynamic_ramp(pll_params, clk_base, parent_rate); in tegra_clk_register_pllxc()
2082 val = readl_relaxed(clk_base + pll_params->base_reg); in tegra_clk_register_pllxc()
2083 val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg); in tegra_clk_register_pllxc()
2090 clk_base + pll_params->iddq_reg); in tegra_clk_register_pllxc()
2094 pll = _tegra_init_pll(clk_base, pmc, pll_params, lock); in tegra_clk_register_pllxc()
2107 void __iomem *clk_base, void __iomem *pmc, in tegra_clk_register_pllre() argument
2122 pll = _tegra_init_pll(clk_base, pmc, pll_params, lock); in tegra_clk_register_pllre()
2130 WARN_ON(readl_relaxed(clk_base + pll_params->iddq_reg) & in tegra_clk_register_pllre()
2156 void __iomem *clk_base, void __iomem *pmc, in tegra_clk_register_pllm() argument
2185 pll = _tegra_init_pll(clk_base, pmc, pll_params, lock); in tegra_clk_register_pllm()
2198 void __iomem *clk_base, void __iomem *pmc, in tegra_clk_register_pllc() argument
2224 pll = _tegra_init_pll(clk_base, pmc, pll_params, lock); in tegra_clk_register_pllc()
2273 void __iomem *clk_base, unsigned long flags, in tegra_clk_register_plle_tegra114() argument
2280 pll = _tegra_init_pll(clk_base, NULL, pll_params, lock); in tegra_clk_register_plle_tegra114()
2296 void __iomem *clk_base, unsigned long flags, in tegra_clk_register_pllu_tegra114() argument
2305 pll = _tegra_init_pll(clk_base, NULL, pll_params, lock); in tegra_clk_register_pllu_tegra114()
2330 void __iomem *clk_base, unsigned long flags, in tegra_clk_register_pllss() argument
2351 pll = _tegra_init_pll(clk_base, NULL, pll_params, lock); in tegra_clk_register_pllss()
2385 val_iddq = readl_relaxed(clk_base + pll_params->iddq_reg); in tegra_clk_register_pllss()
2394 writel_relaxed(val_iddq, clk_base + pll_params->iddq_reg); in tegra_clk_register_pllss()
2412 const char *parent_name, void __iomem *clk_base, in tegra_clk_register_pllre_tegra210() argument
2426 pll = _tegra_init_pll(clk_base, pmc, pll_params, lock); in tegra_clk_register_pllre_tegra210()
2576 void __iomem *clk_base, unsigned long flags, in tegra_clk_register_plle_tegra210() argument
2583 pll = _tegra_init_pll(clk_base, NULL, pll_params, lock); in tegra_clk_register_plle_tegra210()
2598 const char *parent_name, void __iomem *clk_base, in tegra_clk_register_pllc_tegra210() argument
2627 pll = _tegra_init_pll(clk_base, pmc, pll_params, lock); in tegra_clk_register_pllc_tegra210()
2640 const char *parent_name, void __iomem *clk_base, in tegra_clk_register_pllss_tegra210() argument
2660 val = readl_relaxed(clk_base + pll_params->base_reg); in tegra_clk_register_pllss_tegra210()
2675 pll = _tegra_init_pll(clk_base, NULL, pll_params, lock); in tegra_clk_register_pllss_tegra210()
2689 void __iomem *clk_base, void __iomem *pmc, in tegra_clk_register_pllmb() argument
2718 pll = _tegra_init_pll(clk_base, pmc, pll_params, lock); in tegra_clk_register_pllmb()