Lines Matching refs:_offset
132 #define MUX(_name, _parents, _offset, \ argument
134 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
139 #define MUX_FLAGS(_name, _parents, _offset,\ argument
141 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
146 #define MUX8(_name, _parents, _offset, \ argument
148 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
153 #define MUX8_NOGATE_LOCK(_name, _parents, _offset, _clk_id, _lock) \ argument
154 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
159 #define MUX8_NOGATE(_name, _parents, _offset, _clk_id) \ argument
160 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
165 #define INT(_name, _parents, _offset, \ argument
167 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
172 #define INT_FLAGS(_name, _parents, _offset,\ argument
174 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
179 #define INT8(_name, _parents, _offset,\ argument
181 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
186 #define UART(_name, _parents, _offset,\ argument
188 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
193 #define UART8(_name, _parents, _offset,\ argument
195 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
200 #define I2C(_name, _parents, _offset,\ argument
202 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
207 #define XUSB(_name, _parents, _offset, \ argument
209 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset, \
214 #define AUDIO(_name, _offset, _clk_num,\ argument
217 _offset, 16, 0xE01F, 0, 0, 8, 1, \
221 #define NODIV(_name, _parents, _offset, \ argument
224 TEGRA_INIT_DATA_TABLE(_name, NULL, NULL, _parents, _offset,\
240 #define DIV8(_name, _parent_name, _offset, _clk_id, _flags) \ argument
248 .offset = _offset, \
838 #define PLL_OUT(_num, _offset, _div_shift, _div_flags, _rst_shift, _id) \ argument
842 .offset = _offset,\
848 .lock = &_offset ##_lock,\