Lines Matching refs:ad
146 static int admac_alloc_sram_carveout(struct admac_data *ad, in admac_alloc_sram_carveout() argument
154 sram = &ad->txcache; in admac_alloc_sram_carveout()
156 sram = &ad->rxcache; in admac_alloc_sram_carveout()
158 mutex_lock(&ad->cache_alloc_lock); in admac_alloc_sram_carveout()
173 mutex_unlock(&ad->cache_alloc_lock); in admac_alloc_sram_carveout()
178 static void admac_free_sram_carveout(struct admac_data *ad, in admac_free_sram_carveout() argument
187 sram = &ad->txcache; in admac_free_sram_carveout()
189 sram = &ad->rxcache; in admac_free_sram_carveout()
194 mutex_lock(&ad->cache_alloc_lock); in admac_free_sram_carveout()
197 mutex_unlock(&ad->cache_alloc_lock); in admac_free_sram_carveout()
200 static void admac_modify(struct admac_data *ad, int reg, u32 mask, u32 val) in admac_modify() argument
202 void __iomem *addr = ad->base + reg; in admac_modify()
281 static void admac_cyclic_write_one_desc(struct admac_data *ad, int channo, in admac_cyclic_write_one_desc() argument
291 dev_dbg(ad->dev, "ch%d descriptor: addr=0x%pad len=0x%zx flags=0x%lx\n", in admac_cyclic_write_one_desc()
294 writel_relaxed(lower_32_bits(addr), ad->base + REG_DESC_WRITE(channo)); in admac_cyclic_write_one_desc()
295 writel_relaxed(upper_32_bits(addr), ad->base + REG_DESC_WRITE(channo)); in admac_cyclic_write_one_desc()
296 writel_relaxed(tx->period_len, ad->base + REG_DESC_WRITE(channo)); in admac_cyclic_write_one_desc()
297 writel_relaxed(FLAG_DESC_NOTIFY, ad->base + REG_DESC_WRITE(channo)); in admac_cyclic_write_one_desc()
307 static void admac_cyclic_write_desc(struct admac_data *ad, int channo, in admac_cyclic_write_desc() argument
313 if (readl_relaxed(ad->base + REG_DESC_RING(channo)) & RING_FULL) in admac_cyclic_write_desc()
315 admac_cyclic_write_one_desc(ad, channo, tx); in admac_cyclic_write_desc()
339 static u32 admac_cyclic_read_residue(struct admac_data *ad, int channo, in admac_cyclic_read_residue() argument
347 ring1 = readl_relaxed(ad->base + REG_REPORT_RING(channo)); in admac_cyclic_read_residue()
348 residue1 = readl_relaxed(ad->base + REG_RESIDUE(channo)); in admac_cyclic_read_residue()
349 ring2 = readl_relaxed(ad->base + REG_REPORT_RING(channo)); in admac_cyclic_read_residue()
350 residue2 = readl_relaxed(ad->base + REG_RESIDUE(channo)); in admac_cyclic_read_residue()
372 struct admac_data *ad = adchan->host; in admac_tx_status() local
388 residue = admac_cyclic_read_residue(ad, adchan->no, adtx); in admac_tx_status()
407 struct admac_data *ad = adchan->host; in admac_start_chan() local
411 ad->base + REG_CHAN_INTSTATUS(adchan->no, ad->irq_index)); in admac_start_chan()
413 ad->base + REG_CHAN_INTMASK(adchan->no, ad->irq_index)); in admac_start_chan()
417 writel_relaxed(startbit, ad->base + REG_TX_START); in admac_start_chan()
420 writel_relaxed(startbit, ad->base + REG_RX_START); in admac_start_chan()
430 struct admac_data *ad = adchan->host; in admac_stop_chan() local
435 writel_relaxed(stopbit, ad->base + REG_TX_STOP); in admac_stop_chan()
438 writel_relaxed(stopbit, ad->base + REG_RX_STOP); in admac_stop_chan()
448 struct admac_data *ad = adchan->host; in admac_reset_rings() local
451 ad->base + REG_CHAN_CTL(adchan->no)); in admac_reset_rings()
452 writel_relaxed(0, ad->base + REG_CHAN_CTL(adchan->no)); in admac_reset_rings()
457 struct admac_data *ad = adchan->host; in admac_start_current_tx() local
461 writel_relaxed(0, ad->base + REG_CHAN_CTL(ch)); in admac_start_current_tx()
463 admac_cyclic_write_one_desc(ad, ch, adchan->current_tx); in admac_start_current_tx()
465 admac_cyclic_write_desc(ad, ch, adchan->current_tx); in admac_start_current_tx()
548 struct admac_data *ad = adchan->host; in admac_alloc_chan_resources() local
552 ret = admac_alloc_sram_carveout(ad, admac_chan_direction(adchan->no), in admac_alloc_chan_resources()
558 ad->base + REG_CHAN_SRAM_CARVEOUT(adchan->no)); in admac_alloc_chan_resources()
575 struct admac_data *ad = (struct admac_data *) ofdma->of_dma_data; in admac_dma_of_xlate() local
583 if (index >= ad->nchannels) { in admac_dma_of_xlate()
584 dev_err(ad->dev, "channel index %u out of bounds\n", index); in admac_dma_of_xlate()
588 return dma_get_slave_channel(&ad->channels[index].chan); in admac_dma_of_xlate()
591 static int admac_drain_reports(struct admac_data *ad, int channo) in admac_drain_reports() argument
598 if (readl_relaxed(ad->base + REG_REPORT_RING(channo)) & RING_EMPTY) in admac_drain_reports()
601 countval_lo = readl_relaxed(ad->base + REG_REPORT_READ(channo)); in admac_drain_reports()
602 countval_hi = readl_relaxed(ad->base + REG_REPORT_READ(channo)); in admac_drain_reports()
603 unk1 = readl_relaxed(ad->base + REG_REPORT_READ(channo)); in admac_drain_reports()
604 flags = readl_relaxed(ad->base + REG_REPORT_READ(channo)); in admac_drain_reports()
606 dev_dbg(ad->dev, "ch%d report: countval=0x%llx unk1=0x%x flags=0x%x\n", in admac_drain_reports()
613 static void admac_handle_status_err(struct admac_data *ad, int channo) in admac_handle_status_err() argument
617 if (readl_relaxed(ad->base + REG_DESC_RING(channo)) & RING_ERR) { in admac_handle_status_err()
618 writel_relaxed(RING_ERR, ad->base + REG_DESC_RING(channo)); in admac_handle_status_err()
619 dev_err_ratelimited(ad->dev, "ch%d descriptor ring error\n", channo); in admac_handle_status_err()
623 if (readl_relaxed(ad->base + REG_REPORT_RING(channo)) & RING_ERR) { in admac_handle_status_err()
624 writel_relaxed(RING_ERR, ad->base + REG_REPORT_RING(channo)); in admac_handle_status_err()
625 dev_err_ratelimited(ad->dev, "ch%d report ring error\n", channo); in admac_handle_status_err()
630 dev_err(ad->dev, "ch%d unknown error, masking errors as cause of IRQs\n", channo); in admac_handle_status_err()
631 admac_modify(ad, REG_CHAN_INTMASK(channo, ad->irq_index), in admac_handle_status_err()
636 static void admac_handle_status_desc_done(struct admac_data *ad, int channo) in admac_handle_status_desc_done() argument
638 struct admac_chan *adchan = &ad->channels[channo]; in admac_handle_status_desc_done()
643 ad->base + REG_CHAN_INTSTATUS(channo, ad->irq_index)); in admac_handle_status_desc_done()
646 nreports = admac_drain_reports(ad, channo); in admac_handle_status_desc_done()
655 admac_cyclic_write_desc(ad, channo, tx); in admac_handle_status_desc_done()
661 static void admac_handle_chan_int(struct admac_data *ad, int no) in admac_handle_chan_int() argument
663 u32 cause = readl_relaxed(ad->base + REG_CHAN_INTSTATUS(no, ad->irq_index)); in admac_handle_chan_int()
666 admac_handle_status_err(ad, no); in admac_handle_chan_int()
669 admac_handle_status_desc_done(ad, no); in admac_handle_chan_int()
674 struct admac_data *ad = devid; in admac_interrupt() local
678 rx_intstate = readl_relaxed(ad->base + REG_RX_INTSTATE(ad->irq_index)); in admac_interrupt()
679 tx_intstate = readl_relaxed(ad->base + REG_TX_INTSTATE(ad->irq_index)); in admac_interrupt()
684 for (i = 0; i < ad->nchannels; i += 2) { in admac_interrupt()
686 admac_handle_chan_int(ad, i); in admac_interrupt()
690 for (i = 1; i < ad->nchannels; i += 2) { in admac_interrupt()
692 admac_handle_chan_int(ad, i); in admac_interrupt()
728 struct admac_data *ad = adchan->host; in admac_device_config() local
770 writel_relaxed(bus_width, ad->base + REG_BUS_WIDTH(adchan->no)); in admac_device_config()
781 ad->base + REG_CHAN_FIFOCTL(adchan->no)); in admac_device_config()
789 struct admac_data *ad; in admac_probe() local
800 ad = devm_kzalloc(&pdev->dev, struct_size(ad, channels, nchannels), GFP_KERNEL); in admac_probe()
801 if (!ad) in admac_probe()
804 platform_set_drvdata(pdev, ad); in admac_probe()
805 ad->dev = &pdev->dev; in admac_probe()
806 ad->nchannels = nchannels; in admac_probe()
807 mutex_init(&ad->cache_alloc_lock); in admac_probe()
816 ad->irq_index = i; in admac_probe()
823 ad->irq = irq; in admac_probe()
825 ad->base = devm_platform_ioremap_resource(pdev, 0); in admac_probe()
826 if (IS_ERR(ad->base)) in admac_probe()
827 return dev_err_probe(&pdev->dev, PTR_ERR(ad->base), in admac_probe()
830 ad->rstc = devm_reset_control_get_optional_shared(&pdev->dev, NULL); in admac_probe()
831 if (IS_ERR(ad->rstc)) in admac_probe()
832 return PTR_ERR(ad->rstc); in admac_probe()
834 dma = &ad->dma; in admac_probe()
859 struct admac_chan *adchan = &ad->channels[i]; in admac_probe()
861 adchan->host = ad; in admac_probe()
863 adchan->chan.device = &ad->dma; in admac_probe()
872 err = reset_control_reset(ad->rstc); in admac_probe()
877 err = request_irq(irq, admac_interrupt, 0, dev_name(&pdev->dev), ad); in admac_probe()
884 err = dma_async_device_register(&ad->dma); in admac_probe()
890 err = of_dma_controller_register(pdev->dev.of_node, admac_dma_of_xlate, ad); in admac_probe()
892 dma_async_device_unregister(&ad->dma); in admac_probe()
897 ad->txcache.size = readl_relaxed(ad->base + REG_TX_SRAM_SIZE); in admac_probe()
898 ad->rxcache.size = readl_relaxed(ad->base + REG_RX_SRAM_SIZE); in admac_probe()
902 readl_relaxed(ad->base + REG_IMPRINT), ad->txcache.size, ad->rxcache.size); in admac_probe()
907 free_irq(ad->irq, ad); in admac_probe()
909 reset_control_rearm(ad->rstc); in admac_probe()
915 struct admac_data *ad = platform_get_drvdata(pdev); in admac_remove() local
918 dma_async_device_unregister(&ad->dma); in admac_remove()
919 free_irq(ad->irq, ad); in admac_remove()
920 reset_control_rearm(ad->rstc); in admac_remove()