Lines Matching refs:dw
89 if (chan->chip->dw->hdata->reg_map_8_channels) { in axi_chan_config_write()
183 if (chan->chip->dw->hdata->reg_map_8_channels) in axi_chan_disable()
195 if (chan->chip->dw->hdata->reg_map_8_channels) in axi_chan_enable()
218 for (i = 0; i < chip->dw->hdata->nr_channels; i++) { in axi_dma_hw_init()
219 axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); in axi_dma_hw_init()
220 axi_chan_disable(&chip->dw->chan[i]); in axi_dma_hw_init()
230 u32 max_width = chan->chip->dw->hdata->m_data_width; in axi_chan_get_xfer_width()
373 u32 priority = chan->chip->dw->hdata->priority[chan->id]; in axi_chan_block_xfer_start()
588 if (desc->chan->chip->dw->hdata->nr_masters > 1) in set_desc_dest_master()
600 unsigned int data_width = BIT(chan->chip->dw->hdata->m_data_width); in dw_axi_dma_set_hw_desc()
609 axi_block_ts = chan->chip->dw->hdata->block_size[chan->id]; in dw_axi_dma_set_hw_desc()
652 if (chan->chip->dw->hdata->restrict_axi_burst_len) { in dw_axi_dma_set_hw_desc()
653 burst_len = chan->chip->dw->hdata->axi_rw_burst_len; in dw_axi_dma_set_hw_desc()
688 axi_block_ts = chan->chip->dw->hdata->block_size[chan->id]; in calculate_block_len()
692 data_width = BIT(chan->chip->dw->hdata->m_data_width); in calculate_block_len()
882 max_block_ts = chan->chip->dw->hdata->block_size[chan->id]; in dma_chan_prep_dma_memcpy()
923 if (chan->chip->dw->hdata->restrict_axi_burst_len) { in dma_chan_prep_dma_memcpy()
924 u32 burst_len = chan->chip->dw->hdata->axi_rw_burst_len; in dma_chan_prep_dma_memcpy()
1102 struct dw_axi_dma *dw = chip->dw; in dw_axi_dma_interrupt() local
1111 for (i = 0; i < dw->hdata->nr_channels; i++) { in dw_axi_dma_interrupt()
1112 chan = &dw->chan[i]; in dw_axi_dma_interrupt()
1176 if (chan->chip->dw->hdata->reg_map_8_channels) { in dma_chan_pause()
1209 if (chan->chip->dw->hdata->reg_map_8_channels) { in axi_chan_resume()
1285 struct dw_axi_dma *dw = ofdma->of_dma_data; in dw_axi_dma_of_xlate() local
1289 dchan = dma_get_any_slave_channel(&dw->dma); in dw_axi_dma_of_xlate()
1310 chip->dw->hdata->nr_channels = tmp; in parse_device_properties()
1312 chip->dw->hdata->reg_map_8_channels = true; in parse_device_properties()
1320 chip->dw->hdata->nr_masters = tmp; in parse_device_properties()
1328 chip->dw->hdata->m_data_width = tmp; in parse_device_properties()
1331 chip->dw->hdata->nr_channels); in parse_device_properties()
1334 for (tmp = 0; tmp < chip->dw->hdata->nr_channels; tmp++) { in parse_device_properties()
1338 chip->dw->hdata->block_size[tmp] = carr[tmp]; in parse_device_properties()
1342 chip->dw->hdata->nr_channels); in parse_device_properties()
1346 for (tmp = 0; tmp < chip->dw->hdata->nr_channels; tmp++) { in parse_device_properties()
1347 if (carr[tmp] >= chip->dw->hdata->nr_channels) in parse_device_properties()
1350 chip->dw->hdata->priority[tmp] = carr[tmp]; in parse_device_properties()
1361 chip->dw->hdata->restrict_axi_burst_len = true; in parse_device_properties()
1362 chip->dw->hdata->axi_rw_burst_len = tmp; in parse_device_properties()
1372 struct dw_axi_dma *dw; in dw_probe() local
1381 dw = devm_kzalloc(&pdev->dev, sizeof(*dw), GFP_KERNEL); in dw_probe()
1382 if (!dw) in dw_probe()
1389 chip->dw = dw; in dw_probe()
1391 chip->dw->hdata = hdata; in dw_probe()
1419 dw->chan = devm_kcalloc(chip->dev, hdata->nr_channels, in dw_probe()
1420 sizeof(*dw->chan), GFP_KERNEL); in dw_probe()
1421 if (!dw->chan) in dw_probe()
1429 INIT_LIST_HEAD(&dw->dma.channels); in dw_probe()
1431 struct axi_dma_chan *chan = &dw->chan[i]; in dw_probe()
1439 vchan_init(&chan->vc, &dw->dma); in dw_probe()
1443 dma_cap_set(DMA_MEMCPY, dw->dma.cap_mask); in dw_probe()
1444 dma_cap_set(DMA_SLAVE, dw->dma.cap_mask); in dw_probe()
1445 dma_cap_set(DMA_CYCLIC, dw->dma.cap_mask); in dw_probe()
1448 dw->dma.chancnt = hdata->nr_channels; in dw_probe()
1449 dw->dma.max_burst = hdata->axi_rw_burst_len; in dw_probe()
1450 dw->dma.src_addr_widths = AXI_DMA_BUSWIDTHS; in dw_probe()
1451 dw->dma.dst_addr_widths = AXI_DMA_BUSWIDTHS; in dw_probe()
1452 dw->dma.directions = BIT(DMA_MEM_TO_MEM); in dw_probe()
1453 dw->dma.directions |= BIT(DMA_MEM_TO_DEV) | BIT(DMA_DEV_TO_MEM); in dw_probe()
1454 dw->dma.residue_granularity = DMA_RESIDUE_GRANULARITY_BURST; in dw_probe()
1456 dw->dma.dev = chip->dev; in dw_probe()
1457 dw->dma.device_tx_status = dma_chan_tx_status; in dw_probe()
1458 dw->dma.device_issue_pending = dma_chan_issue_pending; in dw_probe()
1459 dw->dma.device_terminate_all = dma_chan_terminate_all; in dw_probe()
1460 dw->dma.device_pause = dma_chan_pause; in dw_probe()
1461 dw->dma.device_resume = dma_chan_resume; in dw_probe()
1463 dw->dma.device_alloc_chan_resources = dma_chan_alloc_chan_resources; in dw_probe()
1464 dw->dma.device_free_chan_resources = dma_chan_free_chan_resources; in dw_probe()
1466 dw->dma.device_prep_dma_memcpy = dma_chan_prep_dma_memcpy; in dw_probe()
1467 dw->dma.device_synchronize = dw_axi_dma_synchronize; in dw_probe()
1468 dw->dma.device_config = dw_axi_dma_chan_slave_config; in dw_probe()
1469 dw->dma.device_prep_slave_sg = dw_axi_dma_chan_prep_slave_sg; in dw_probe()
1470 dw->dma.device_prep_dma_cyclic = dw_axi_dma_chan_prep_cyclic; in dw_probe()
1477 dw->dma.dev->dma_parms = &dw->dma_parms; in dw_probe()
1497 ret = dmaenginem_async_device_register(&dw->dma); in dw_probe()
1503 dw_axi_dma_of_xlate, dw); in dw_probe()
1509 dw->hdata->nr_channels); in dw_probe()
1522 struct dw_axi_dma *dw = chip->dw; in dw_remove() local
1530 for (i = 0; i < dw->hdata->nr_channels; i++) { in dw_remove()
1531 axi_chan_disable(&chip->dw->chan[i]); in dw_remove()
1532 axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); in dw_remove()
1543 list_for_each_entry_safe(chan, _chan, &dw->dma.channels, in dw_remove()