Lines Matching refs:src_cnt

115 		int src_cnt, u32 addr);
181 unsigned int src_cnt) in prep_dma_xor_dbg() argument
186 for (i = 0; i < src_cnt; i++) in prep_dma_xor_dbg()
192 unsigned int src_cnt) in prep_dma_pq_dbg() argument
197 for (i = 0; i < src_cnt; i++) in prep_dma_pq_dbg()
205 unsigned int src_cnt, in prep_dma_pqzero_sum_dbg() argument
212 for (i = 0; i < src_cnt; i++) in prep_dma_pqzero_sum_dbg()
215 for (i = 0; i < src_cnt; i++) in prep_dma_pqzero_sum_dbg()
221 pr_debug("\t0x%016llx ", src[src_cnt + i]); in prep_dma_pqzero_sum_dbg()
264 desc->src_cnt = 0; in ppc440spe_desc_init_null_xor()
272 int src_cnt, unsigned long flags) in ppc440spe_desc_init_xor() argument
278 desc->src_cnt = src_cnt; in ppc440spe_desc_init_xor()
281 hw_desc->cbc = XOR_CBCR_TGT_BIT | src_cnt; in ppc440spe_desc_init_xor()
292 int dst_cnt, int src_cnt, unsigned long flags) in ppc440spe_desc_init_dma2pq() argument
298 desc->src_cnt = src_cnt; in ppc440spe_desc_init_dma2pq()
318 int dst_cnt, int src_cnt, unsigned long flags, in ppc440spe_desc_init_dma01pq() argument
327 desc->src_cnt = src_cnt; in ppc440spe_desc_init_dma01pq()
432 int dst_cnt, int src_cnt) in ppc440spe_desc_init_dma01pqzero_sum() argument
458 iter->src_cnt = 0; in ppc440spe_desc_init_dma01pqzero_sum()
466 if (i++ < src_cnt) in ppc440spe_desc_init_dma01pqzero_sum()
494 desc->src_cnt = src_cnt; in ppc440spe_desc_init_dma01pqzero_sum()
508 desc->src_cnt = 1; in ppc440spe_desc_init_memcpy()
791 static int ppc440spe_chan_xor_slot_count(size_t len, int src_cnt, in ppc440spe_chan_xor_slot_count() argument
797 slot_cnt = *slots_per_op = (src_cnt + XOR_MAX_OPS - 1)/XOR_MAX_OPS; in ppc440spe_chan_xor_slot_count()
813 int src_cnt, size_t len) in ppc440spe_dma2_pq_slot_count() argument
819 for (i = 1; i < src_cnt; i++) { in ppc440spe_dma2_pq_slot_count()
828 if (i == src_cnt-1) in ppc440spe_dma2_pq_slot_count()
834 if (i == src_cnt-1) in ppc440spe_dma2_pq_slot_count()
841 if (i == src_cnt-2 || (order == -1 in ppc440spe_dma2_pq_slot_count()
848 if (i == src_cnt-1) in ppc440spe_dma2_pq_slot_count()
852 if (i == src_cnt-1) in ppc440spe_dma2_pq_slot_count()
856 if (i == src_cnt-1) in ppc440spe_dma2_pq_slot_count()
873 if (src_cnt <= 1 || (state != 1 && state != 2)) { in ppc440spe_dma2_pq_slot_count()
875 __func__, src_cnt, state, addr_count, order); in ppc440spe_dma2_pq_slot_count()
876 for (i = 0; i < src_cnt; i++) in ppc440spe_dma2_pq_slot_count()
1251 static int ppc440spe_can_rxor(struct page **srcs, int src_cnt, size_t len) in ppc440spe_can_rxor() argument
1256 if (unlikely(!(src_cnt > 1))) in ppc440spe_can_rxor()
1259 BUG_ON(src_cnt > ARRAY_SIZE(ppc440spe_rxor_srcs)); in ppc440spe_can_rxor()
1262 for (i = 0; i < src_cnt; i++) { in ppc440spe_can_rxor()
1267 src_cnt = idx; in ppc440spe_can_rxor()
1269 for (i = 1; i < src_cnt; i++) { in ppc440spe_can_rxor()
1287 if ((i == src_cnt - 2) || in ppc440spe_can_rxor()
1328 struct page **src_lst, int src_cnt, size_t src_sz) in ppc440spe_adma_estimate() argument
1351 if (dst_cnt == 1 && src_cnt == 2 && dst_lst[0] == src_lst[1]) in ppc440spe_adma_estimate()
1353 else if (ppc440spe_can_rxor(src_lst, src_cnt, src_sz)) in ppc440spe_adma_estimate()
1370 int src_cnt, size_t src_sz) in ppc440spe_async_tx_find_best_channel() argument
1386 if (src_cnt == 1 && dst_lst[1] == src_lst[0]) in ppc440spe_async_tx_find_best_channel()
1388 if (src_cnt == 2 && dst_lst[1] == src_lst[1]) in ppc440spe_async_tx_find_best_channel()
1404 dst_cnt, src_lst, src_cnt, src_sz); in ppc440spe_async_tx_find_best_channel()
1426 if (entry_idx < 0 || entry_idx >= (tdesc->src_cnt + tdesc->dst_cnt)) { in ppc440spe_get_group_entry()
1428 __func__, entry_idx, tdesc->src_cnt, tdesc->dst_cnt); in ppc440spe_get_group_entry()
2018 dma_addr_t *dma_src, u32 src_cnt, size_t len, in ppc440spe_adma_prep_dma_xor() argument
2028 dma_dest, dma_src, src_cnt)); in ppc440spe_adma_prep_dma_xor()
2035 ppc440spe_chan->device->id, __func__, src_cnt, len, in ppc440spe_adma_prep_dma_xor()
2039 slot_cnt = ppc440spe_chan_xor_slot_count(len, src_cnt, &slots_per_op); in ppc440spe_adma_prep_dma_xor()
2044 ppc440spe_desc_init_xor(group_start, src_cnt, flags); in ppc440spe_adma_prep_dma_xor()
2046 while (src_cnt--) in ppc440spe_adma_prep_dma_xor()
2048 dma_src[src_cnt], src_cnt); in ppc440spe_adma_prep_dma_xor()
2060 int src_cnt);
2068 dma_addr_t *src, int src_cnt) in ppc440spe_adma_init_dma2rxor_slot() argument
2073 for (i = 0; i < src_cnt; i++) { in ppc440spe_adma_init_dma2rxor_slot()
2075 desc->src_cnt, (u32)src[i]); in ppc440spe_adma_init_dma2rxor_slot()
2085 dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt, in ppc440spe_dma01_prep_mult() argument
2106 sw_desc->src_cnt = src_cnt; in ppc440spe_dma01_prep_mult()
2171 dma_addr_t *dst, dma_addr_t *src, int src_cnt, in ppc440spe_dma01_prep_sum_product() argument
2192 sw_desc->src_cnt = src_cnt; in ppc440spe_dma01_prep_sum_product()
2275 dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt, in ppc440spe_dma01_prep_pq() argument
2284 __func__, dst_cnt, src_cnt, len); in ppc440spe_dma01_prep_pq()
2297 if (src_cnt > 1 && in ppc440spe_dma01_prep_pq()
2302 if (src_cnt != 2) { in ppc440spe_dma01_prep_pq()
2342 slot_cnt = src_cnt; in ppc440spe_dma01_prep_pq()
2365 slot_cnt += src_cnt - 2; in ppc440spe_dma01_prep_pq()
2367 slot_cnt += src_cnt - 3; in ppc440spe_dma01_prep_pq()
2381 ppc440spe_desc_init_dma01pq(sw_desc, dst_cnt, src_cnt, in ppc440spe_dma01_prep_pq()
2388 while (src_cnt--) { in ppc440spe_dma01_prep_pq()
2389 ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt], in ppc440spe_dma01_prep_pq()
2390 src_cnt); in ppc440spe_dma01_prep_pq()
2399 mult = scf[src_cnt]; in ppc440spe_dma01_prep_pq()
2401 mult, src_cnt, dst_cnt - 1); in ppc440spe_dma01_prep_pq()
2420 dma_addr_t *dst, int dst_cnt, dma_addr_t *src, int src_cnt, in ppc440spe_dma2_prep_pq() argument
2433 descs_per_op = ppc440spe_dma2_pq_slot_count(src, src_cnt, len); in ppc440spe_dma2_prep_pq()
2447 ppc440spe_desc_init_dma2pq(iter, dst_cnt, src_cnt, in ppc440spe_dma2_prep_pq()
2462 src_cnt); in ppc440spe_dma2_prep_pq()
2487 while (src_cnt--) { in ppc440spe_dma2_prep_pq()
2491 ppc440spe_adma_pq_set_src(sw_desc, src[src_cnt], in ppc440spe_dma2_prep_pq()
2492 src_cnt); in ppc440spe_dma2_prep_pq()
2494 mult = scf[src_cnt]; in ppc440spe_dma2_prep_pq()
2496 mult, src_cnt, dst_cnt - 1); in ppc440spe_dma2_prep_pq()
2509 unsigned int src_cnt, const unsigned char *scf, in ppc440spe_adma_prep_dma_pq() argument
2519 dst, src, src_cnt)); in ppc440spe_adma_prep_dma_pq()
2522 BUG_ON(!src_cnt); in ppc440spe_adma_prep_dma_pq()
2524 if (src_cnt == 1 && dst[1] == src[0]) { in ppc440spe_adma_prep_dma_pq()
2532 dest, 2, src, src_cnt, scf, len, flags); in ppc440spe_adma_prep_dma_pq()
2536 if (src_cnt == 2 && dst[1] == src[1]) { in ppc440spe_adma_prep_dma_pq()
2558 ppc440spe_chan->device->id, __func__, src_cnt, len, in ppc440spe_adma_prep_dma_pq()
2565 dst, dst_cnt, src, src_cnt, scf, in ppc440spe_adma_prep_dma_pq()
2571 dst, dst_cnt, src, src_cnt, scf, in ppc440spe_adma_prep_dma_pq()
2585 unsigned int src_cnt, const unsigned char *scf, size_t len, in ppc440spe_adma_prep_dma_pqzero_sum() argument
2606 src, src_cnt, scf)); in ppc440spe_adma_prep_dma_pqzero_sum()
2616 slot_cnt = src_cnt + dst_cnt * 2; in ppc440spe_adma_prep_dma_pqzero_sum()
2623 ppc440spe_desc_init_dma01pqzero_sum(sw_desc, dst_cnt, src_cnt); in ppc440spe_adma_prep_dma_pqzero_sum()
2645 iter->src_cnt = 0; in ppc440spe_adma_prep_dma_pqzero_sum()
2677 iter->src_cnt = 0; in ppc440spe_adma_prep_dma_pqzero_sum()
2741 src[src_cnt - 1]); in ppc440spe_adma_prep_dma_pqzero_sum()
2748 scf[src_cnt - 1]); in ppc440spe_adma_prep_dma_pqzero_sum()
2750 if (!(--src_cnt)) in ppc440spe_adma_prep_dma_pqzero_sum()
2763 struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, in ppc440spe_adma_prep_dma_xor_zero_sum() argument
2775 src_cnt - 1, 0, len, in ppc440spe_adma_prep_dma_xor_zero_sum()
3085 int src_cnt) in ppc440spe_desc_set_xor_src_cnt() argument
3090 hw_desc->cbc |= src_cnt; in ppc440spe_desc_set_xor_src_cnt()
3223 struct ppc440spe_rxor *cursor, int index, int src_cnt) in ppc440spe_adma_dma2rxor_inc_addr() argument
3226 if (index == src_cnt - 1) { in ppc440spe_adma_dma2rxor_inc_addr()
3241 int src_cnt, u32 addr) in ppc440spe_adma_dma2rxor_prep_src() argument
3259 if (index == src_cnt-1) { in ppc440spe_adma_dma2rxor_prep_src()
3264 desc, cursor, index, src_cnt); in ppc440spe_adma_dma2rxor_prep_src()
3271 if (index == src_cnt-1) { in ppc440spe_adma_dma2rxor_prep_src()
3276 desc, cursor, index, src_cnt); in ppc440spe_adma_dma2rxor_prep_src()
3288 if (index == src_cnt-2 || (sign == -1 in ppc440spe_adma_dma2rxor_prep_src()
3297 desc, cursor, index, src_cnt); in ppc440spe_adma_dma2rxor_prep_src()
3304 if (index == src_cnt-1) { in ppc440spe_adma_dma2rxor_prep_src()
3306 desc, cursor, index, src_cnt); in ppc440spe_adma_dma2rxor_prep_src()
3314 if (index == src_cnt-1) { in ppc440spe_adma_dma2rxor_prep_src()
3316 desc, cursor, index, src_cnt); in ppc440spe_adma_dma2rxor_prep_src()
3324 if (index == src_cnt-1) { in ppc440spe_adma_dma2rxor_prep_src()
3326 desc, cursor, index, src_cnt); in ppc440spe_adma_dma2rxor_prep_src()
3336 desc, cursor, index, src_cnt); in ppc440spe_adma_dma2rxor_prep_src()
3345 desc, cursor, index, src_cnt); in ppc440spe_adma_dma2rxor_prep_src()