Lines Matching refs:ARM_SMCCC_OWNER_SIP
162 (ARM_SMCCC_OWNER_SIP << ARM_SMCCC_OWNER_SHIFT), in __get_convention()
164 .owner = ARM_SMCCC_OWNER_SIP, in __get_convention()
271 .owner = ARM_SMCCC_OWNER_SIP, in __qcom_scm_is_call_available()
280 (ARM_SMCCC_OWNER_SIP << ARM_SMCCC_OWNER_SHIFT); in __qcom_scm_is_call_available()
303 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_set_boot_addr()
323 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_set_boot_addr_mc()
384 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_cpu_power_down()
399 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_set_remote_state()
417 .owner = ARM_SMCCC_OWNER_SIP, in __qcom_scm_set_dload_mode()
475 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_pas_init_image()
556 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_pas_mem_setup()
591 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_pas_auth_and_reset()
625 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_pas_shutdown()
661 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_pas_supported()
683 .owner = ARM_SMCCC_OWNER_SIP, in __qcom_scm_pas_mss_reset()
723 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_io_readl()
745 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_io_writel()
773 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_restore_sec_cfg()
791 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_iommu_secure_ptbl_size()
815 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_iommu_secure_ptbl_init()
837 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_iommu_set_cp_pool_size()
858 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_mem_protect_video_var()
886 .owner = ARM_SMCCC_OWNER_SIP, in __qcom_scm_assign_mem()
1068 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_ice_invalidate_key()
1109 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_ice_set_key()
1190 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_hdcp_req()
1219 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_iommu_set_pt_format()
1234 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_qsmmu500_wait_safe_toggle()
1255 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_lmh_profile_change()
1278 .owner = ARM_SMCCC_OWNER_SIP, in qcom_scm_lmh_dcvsh()