Lines Matching refs:ctrl_reg
337 u32 ctrl_reg; in socfpga_fpga_cfg_mode_set() local
346 ctrl_reg = socfpga_fpga_readl(priv, SOCFPGA_FPGMGR_CTL_OFST); in socfpga_fpga_cfg_mode_set()
347 ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_CDRATIO_MASK; in socfpga_fpga_cfg_mode_set()
348 ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_CFGWDTH_MASK; in socfpga_fpga_cfg_mode_set()
349 ctrl_reg |= cfgmgr_modes[mode].ctrl; in socfpga_fpga_cfg_mode_set()
352 ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_NCE; in socfpga_fpga_cfg_mode_set()
353 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg); in socfpga_fpga_cfg_mode_set()
361 u32 ctrl_reg, status; in socfpga_fpga_reset() local
378 ctrl_reg = socfpga_fpga_readl(priv, SOCFPGA_FPGMGR_CTL_OFST); in socfpga_fpga_reset()
379 ctrl_reg |= SOCFPGA_FPGMGR_CTL_NCFGPULL; in socfpga_fpga_reset()
380 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg); in socfpga_fpga_reset()
386 ctrl_reg &= ~SOCFPGA_FPGMGR_CTL_NCFGPULL; in socfpga_fpga_reset()
387 socfpga_fpga_writel(priv, SOCFPGA_FPGMGR_CTL_OFST, ctrl_reg); in socfpga_fpga_reset()