Lines Matching refs:dwapb_write
158 static inline void dwapb_write(struct dwapb_gpio *gpio, unsigned int offset, in dwapb_write() function
200 dwapb_write(gpio, GPIO_INT_POLARITY, pol); in dwapb_toggle_trigger()
246 dwapb_write(gpio, GPIO_PORTA_EOI, val); in dwapb_irq_ack()
260 dwapb_write(gpio, GPIO_INTMASK, val); in dwapb_irq_mask()
278 dwapb_write(gpio, GPIO_INTMASK, val); in dwapb_irq_unmask()
292 dwapb_write(gpio, GPIO_INTEN, val); in dwapb_irq_enable()
306 dwapb_write(gpio, GPIO_INTEN, val); in dwapb_irq_disable()
349 dwapb_write(gpio, GPIO_INTTYPE_LEVEL, level); in dwapb_irq_set_type()
351 dwapb_write(gpio, GPIO_INT_POLARITY, polarity); in dwapb_irq_set_type()
404 dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, val_deb); in dwapb_gpio_set_debounce()
774 dwapb_write(gpio, GPIO_INTMASK, ~ctx->wake_en); in dwapb_gpio_suspend()
804 dwapb_write(gpio, offset, ctx->data); in dwapb_gpio_resume()
807 dwapb_write(gpio, offset, ctx->dir); in dwapb_gpio_resume()
810 dwapb_write(gpio, offset, ctx->ext); in dwapb_gpio_resume()
814 dwapb_write(gpio, GPIO_INTTYPE_LEVEL, ctx->int_type); in dwapb_gpio_resume()
815 dwapb_write(gpio, GPIO_INT_POLARITY, ctx->int_pol); in dwapb_gpio_resume()
816 dwapb_write(gpio, GPIO_PORTA_DEBOUNCE, ctx->int_deb); in dwapb_gpio_resume()
817 dwapb_write(gpio, GPIO_INTEN, ctx->int_en); in dwapb_gpio_resume()
818 dwapb_write(gpio, GPIO_INTMASK, ctx->int_mask); in dwapb_gpio_resume()
821 dwapb_write(gpio, GPIO_PORTA_EOI, 0xffffffff); in dwapb_gpio_resume()