Lines Matching refs:epg

82 static void ep93xx_gpio_update_int_params(struct ep93xx_gpio *epg,  in ep93xx_gpio_update_int_params()  argument
85 writeb_relaxed(0, epg->base + eic->irq_offset + EP93XX_INT_EN_OFFSET); in ep93xx_gpio_update_int_params()
88 epg->base + eic->irq_offset + EP93XX_INT_TYPE2_OFFSET); in ep93xx_gpio_update_int_params()
91 epg->base + eic->irq_offset + EP93XX_INT_TYPE1_OFFSET); in ep93xx_gpio_update_int_params()
94 epg->base + eic->irq_offset + EP93XX_INT_EN_OFFSET); in ep93xx_gpio_update_int_params()
100 struct ep93xx_gpio *epg = gpiochip_get_data(gc); in ep93xx_gpio_int_debounce() local
110 epg->base + eic->irq_offset + EP93XX_INT_DEBOUNCE_OFFSET); in ep93xx_gpio_int_debounce()
116 struct ep93xx_gpio *epg = gpiochip_get_data(gc); in ep93xx_gpio_ab_irq_handler() local
129 stat = readb(epg->base + EP93XX_GPIO_A_INT_STATUS); in ep93xx_gpio_ab_irq_handler()
131 generic_handle_domain_irq(epg->gc[0].gc.irq.domain, in ep93xx_gpio_ab_irq_handler()
134 stat = readb(epg->base + EP93XX_GPIO_B_INT_STATUS); in ep93xx_gpio_ab_irq_handler()
136 generic_handle_domain_irq(epg->gc[1].gc.irq.domain, in ep93xx_gpio_ab_irq_handler()
163 struct ep93xx_gpio *epg = gpiochip_get_data(gc); in ep93xx_gpio_irq_ack() local
168 ep93xx_gpio_update_int_params(epg, eic); in ep93xx_gpio_irq_ack()
171 writeb(port_mask, epg->base + eic->irq_offset + EP93XX_INT_EOI_OFFSET); in ep93xx_gpio_irq_ack()
178 struct ep93xx_gpio *epg = gpiochip_get_data(gc); in ep93xx_gpio_irq_mask_ack() local
185 ep93xx_gpio_update_int_params(epg, eic); in ep93xx_gpio_irq_mask_ack()
187 writeb(port_mask, epg->base + eic->irq_offset + EP93XX_INT_EOI_OFFSET); in ep93xx_gpio_irq_mask_ack()
195 struct ep93xx_gpio *epg = gpiochip_get_data(gc); in ep93xx_gpio_irq_mask() local
198 ep93xx_gpio_update_int_params(epg, eic); in ep93xx_gpio_irq_mask()
206 struct ep93xx_gpio *epg = gpiochip_get_data(gc); in ep93xx_gpio_irq_unmask() local
210 ep93xx_gpio_update_int_params(epg, eic); in ep93xx_gpio_irq_unmask()
222 struct ep93xx_gpio *epg = gpiochip_get_data(gc); in ep93xx_gpio_irq_type() local
267 ep93xx_gpio_update_int_params(epg, eic); in ep93xx_gpio_irq_type()
347 struct ep93xx_gpio *epg, in ep93xx_gpio_add_bank() argument
350 void __iomem *data = epg->base + bank->data; in ep93xx_gpio_add_bank()
351 void __iomem *dir = epg->base + bank->dir; in ep93xx_gpio_add_bank()
412 irq_set_chip_data(gpio_irq, &epg->gc[5]); in ep93xx_gpio_add_bank()
423 return devm_gpiochip_add_data(dev, gc, epg); in ep93xx_gpio_add_bank()
428 struct ep93xx_gpio *epg; in ep93xx_gpio_probe() local
431 epg = devm_kzalloc(&pdev->dev, sizeof(*epg), GFP_KERNEL); in ep93xx_gpio_probe()
432 if (!epg) in ep93xx_gpio_probe()
435 epg->base = devm_platform_ioremap_resource(pdev, 0); in ep93xx_gpio_probe()
436 if (IS_ERR(epg->base)) in ep93xx_gpio_probe()
437 return PTR_ERR(epg->base); in ep93xx_gpio_probe()
440 struct ep93xx_gpio_chip *gc = &epg->gc[i]; in ep93xx_gpio_probe()
443 if (ep93xx_gpio_add_bank(gc, pdev, epg, bank)) in ep93xx_gpio_probe()