Lines Matching refs:rg
66 mtk_gpio_w32(struct mtk_gc *rg, u32 offset, u32 val) in mtk_gpio_w32() argument
68 struct gpio_chip *gc = &rg->chip; in mtk_gpio_w32()
71 offset = (rg->bank * GPIO_BANK_STRIDE) + offset; in mtk_gpio_w32()
76 mtk_gpio_r32(struct mtk_gc *rg, u32 offset) in mtk_gpio_r32() argument
78 struct gpio_chip *gc = &rg->chip; in mtk_gpio_r32()
81 offset = (rg->bank * GPIO_BANK_STRIDE) + offset; in mtk_gpio_r32()
89 struct mtk_gc *rg = to_mediatek_gpio(gc); in mediatek_gpio_irq_handler() local
94 pending = mtk_gpio_r32(rg, GPIO_REG_STAT); in mediatek_gpio_irq_handler()
98 mtk_gpio_w32(rg, GPIO_REG_STAT, BIT(bit)); in mediatek_gpio_irq_handler()
109 struct mtk_gc *rg = to_mediatek_gpio(gc); in mediatek_gpio_irq_unmask() local
116 spin_lock_irqsave(&rg->lock, flags); in mediatek_gpio_irq_unmask()
117 rise = mtk_gpio_r32(rg, GPIO_REG_REDGE); in mediatek_gpio_irq_unmask()
118 fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE); in mediatek_gpio_irq_unmask()
119 high = mtk_gpio_r32(rg, GPIO_REG_HLVL); in mediatek_gpio_irq_unmask()
120 low = mtk_gpio_r32(rg, GPIO_REG_LLVL); in mediatek_gpio_irq_unmask()
121 mtk_gpio_w32(rg, GPIO_REG_REDGE, rise | (BIT(pin) & rg->rising)); in mediatek_gpio_irq_unmask()
122 mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall | (BIT(pin) & rg->falling)); in mediatek_gpio_irq_unmask()
123 mtk_gpio_w32(rg, GPIO_REG_HLVL, high | (BIT(pin) & rg->hlevel)); in mediatek_gpio_irq_unmask()
124 mtk_gpio_w32(rg, GPIO_REG_LLVL, low | (BIT(pin) & rg->llevel)); in mediatek_gpio_irq_unmask()
125 spin_unlock_irqrestore(&rg->lock, flags); in mediatek_gpio_irq_unmask()
132 struct mtk_gc *rg = to_mediatek_gpio(gc); in mediatek_gpio_irq_mask() local
137 spin_lock_irqsave(&rg->lock, flags); in mediatek_gpio_irq_mask()
138 rise = mtk_gpio_r32(rg, GPIO_REG_REDGE); in mediatek_gpio_irq_mask()
139 fall = mtk_gpio_r32(rg, GPIO_REG_FEDGE); in mediatek_gpio_irq_mask()
140 high = mtk_gpio_r32(rg, GPIO_REG_HLVL); in mediatek_gpio_irq_mask()
141 low = mtk_gpio_r32(rg, GPIO_REG_LLVL); in mediatek_gpio_irq_mask()
142 mtk_gpio_w32(rg, GPIO_REG_FEDGE, fall & ~BIT(pin)); in mediatek_gpio_irq_mask()
143 mtk_gpio_w32(rg, GPIO_REG_REDGE, rise & ~BIT(pin)); in mediatek_gpio_irq_mask()
144 mtk_gpio_w32(rg, GPIO_REG_HLVL, high & ~BIT(pin)); in mediatek_gpio_irq_mask()
145 mtk_gpio_w32(rg, GPIO_REG_LLVL, low & ~BIT(pin)); in mediatek_gpio_irq_mask()
146 spin_unlock_irqrestore(&rg->lock, flags); in mediatek_gpio_irq_mask()
155 struct mtk_gc *rg = to_mediatek_gpio(gc); in mediatek_gpio_irq_type() local
160 if ((rg->rising | rg->falling | in mediatek_gpio_irq_type()
161 rg->hlevel | rg->llevel) & mask) in mediatek_gpio_irq_type()
167 rg->rising &= ~mask; in mediatek_gpio_irq_type()
168 rg->falling &= ~mask; in mediatek_gpio_irq_type()
169 rg->hlevel &= ~mask; in mediatek_gpio_irq_type()
170 rg->llevel &= ~mask; in mediatek_gpio_irq_type()
174 rg->rising |= mask; in mediatek_gpio_irq_type()
175 rg->falling |= mask; in mediatek_gpio_irq_type()
178 rg->rising |= mask; in mediatek_gpio_irq_type()
181 rg->falling |= mask; in mediatek_gpio_irq_type()
184 rg->hlevel |= mask; in mediatek_gpio_irq_type()
187 rg->llevel |= mask; in mediatek_gpio_irq_type()
199 struct mtk_gc *rg = to_mediatek_gpio(chip); in mediatek_gpio_xlate() local
201 if (rg->bank != gpio / MTK_BANK_WIDTH) in mediatek_gpio_xlate()
224 struct mtk_gc *rg; in mediatek_gpio_bank_probe() local
228 rg = &mtk->gc_map[bank]; in mediatek_gpio_bank_probe()
229 memset(rg, 0, sizeof(*rg)); in mediatek_gpio_bank_probe()
231 spin_lock_init(&rg->lock); in mediatek_gpio_bank_probe()
232 rg->bank = bank; in mediatek_gpio_bank_probe()
234 dat = mtk->base + GPIO_REG_DATA + (rg->bank * GPIO_BANK_STRIDE); in mediatek_gpio_bank_probe()
235 set = mtk->base + GPIO_REG_DSET + (rg->bank * GPIO_BANK_STRIDE); in mediatek_gpio_bank_probe()
236 ctrl = mtk->base + GPIO_REG_DCLR + (rg->bank * GPIO_BANK_STRIDE); in mediatek_gpio_bank_probe()
237 diro = mtk->base + GPIO_REG_CTRL + (rg->bank * GPIO_BANK_STRIDE); in mediatek_gpio_bank_probe()
239 ret = bgpio_init(&rg->chip, dev, 4, dat, set, ctrl, diro, NULL, in mediatek_gpio_bank_probe()
246 rg->chip.of_gpio_n_cells = 2; in mediatek_gpio_bank_probe()
247 rg->chip.of_xlate = mediatek_gpio_xlate; in mediatek_gpio_bank_probe()
248 rg->chip.label = devm_kasprintf(dev, GFP_KERNEL, "%s-bank%d", in mediatek_gpio_bank_probe()
250 if (!rg->chip.label) in mediatek_gpio_bank_probe()
253 rg->chip.offset = bank * MTK_BANK_WIDTH; in mediatek_gpio_bank_probe()
264 rg->chip.label, &rg->chip); in mediatek_gpio_bank_probe()
272 girq = &rg->chip.irq; in mediatek_gpio_bank_probe()
282 ret = devm_gpiochip_add_data(dev, &rg->chip, mtk); in mediatek_gpio_bank_probe()
285 rg->chip.ngpio, ret); in mediatek_gpio_bank_probe()
290 mtk_gpio_w32(rg, GPIO_REG_POL, 0); in mediatek_gpio_bank_probe()
292 dev_info(dev, "registering %d gpios\n", rg->chip.ngpio); in mediatek_gpio_bank_probe()