Lines Matching refs:gpio_num
100 static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned int gpio_num) in sch_gpio_direction_in() argument
106 sch_gpio_reg_set(sch, gpio_num, GIO, 1); in sch_gpio_direction_in()
111 static int sch_gpio_get(struct gpio_chip *gc, unsigned int gpio_num) in sch_gpio_get() argument
115 return sch_gpio_reg_get(sch, gpio_num, GLV); in sch_gpio_get()
118 static void sch_gpio_set(struct gpio_chip *gc, unsigned int gpio_num, int val) in sch_gpio_set() argument
124 sch_gpio_reg_set(sch, gpio_num, GLV, val); in sch_gpio_set()
128 static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned int gpio_num, in sch_gpio_direction_out() argument
135 sch_gpio_reg_set(sch, gpio_num, GIO, 0); in sch_gpio_direction_out()
147 sch_gpio_set(gc, gpio_num, val); in sch_gpio_direction_out()
151 static int sch_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio_num) in sch_gpio_get_direction() argument
155 if (sch_gpio_reg_get(sch, gpio_num, GIO)) in sch_gpio_get_direction()
175 irq_hw_number_t gpio_num = irqd_to_hwirq(d); in sch_irq_type() local
198 sch_gpio_reg_set(sch, gpio_num, GTPE, rising); in sch_irq_type()
199 sch_gpio_reg_set(sch, gpio_num, GTNE, falling); in sch_irq_type()
212 irq_hw_number_t gpio_num = irqd_to_hwirq(d); in sch_irq_ack() local
216 sch_gpio_reg_set(sch, gpio_num, GTS, 1); in sch_irq_ack()
220 static void sch_irq_mask_unmask(struct gpio_chip *gc, irq_hw_number_t gpio_num, int val) in sch_irq_mask_unmask() argument
226 sch_gpio_reg_set(sch, gpio_num, GGPE, val); in sch_irq_mask_unmask()
233 irq_hw_number_t gpio_num = irqd_to_hwirq(d); in sch_irq_mask() local
235 sch_irq_mask_unmask(gc, gpio_num, 0); in sch_irq_mask()
236 gpiochip_disable_irq(gc, gpio_num); in sch_irq_mask()
242 irq_hw_number_t gpio_num = irqd_to_hwirq(d); in sch_irq_unmask() local
244 gpiochip_enable_irq(gc, gpio_num); in sch_irq_unmask()
245 sch_irq_mask_unmask(gc, gpio_num, 1); in sch_irq_unmask()