Lines Matching refs:gfx
46 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_mec_queue_to_bit()
47 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
48 bit += pipe * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_mec_queue_to_bit()
57 *queue = bit % adev->gfx.mec.num_queue_per_pipe; in amdgpu_queue_mask_bit_to_mec_queue()
58 *pipe = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
59 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
60 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_queue_mask_bit_to_mec_queue()
61 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_queue_mask_bit_to_mec_queue()
69 adev->gfx.mec.queue_bitmap); in amdgpu_gfx_is_mec_queue_enabled()
77 bit += me * adev->gfx.me.num_pipe_per_me in amdgpu_gfx_me_queue_to_bit()
78 * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()
79 bit += pipe * adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_me_queue_to_bit()
88 *queue = bit % adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_bit_to_me_queue()
89 *pipe = (bit / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_bit_to_me_queue()
90 % adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_bit_to_me_queue()
91 *me = (bit / adev->gfx.me.num_queue_per_pipe) in amdgpu_gfx_bit_to_me_queue()
92 / adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_bit_to_me_queue()
99 adev->gfx.me.queue_bitmap); in amdgpu_gfx_is_me_queue_enabled()
148 return amdgpu_async_gfx_ring && adev->gfx.me.num_pipe_per_me > 1; in amdgpu_gfx_is_graphics_multipipe_capable()
167 return adev->gfx.mec.num_mec > 1; in amdgpu_gfx_is_compute_multipipe_capable()
180 adev->gfx.num_gfx_rings > 1 && pipe == 1 && queue == 0) { in amdgpu_gfx_is_high_priority_graphics_queue()
185 if (ring == &adev->gfx.gfx_ring[bit]) in amdgpu_gfx_is_high_priority_graphics_queue()
198 if (adev->gfx.num_compute_rings > 1 && in amdgpu_gfx_is_high_priority_compute_queue()
199 ring == &adev->gfx.compute_ring[0]) in amdgpu_gfx_is_high_priority_compute_queue()
209 int max_queues_per_mec = min(adev->gfx.mec.num_pipe_per_mec * in amdgpu_gfx_compute_queue_acquire()
210 adev->gfx.mec.num_queue_per_pipe, in amdgpu_gfx_compute_queue_acquire()
211 adev->gfx.num_compute_rings); in amdgpu_gfx_compute_queue_acquire()
216 pipe = i % adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_compute_queue_acquire()
217 queue = (i / adev->gfx.mec.num_pipe_per_mec) % in amdgpu_gfx_compute_queue_acquire()
218 adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_compute_queue_acquire()
220 set_bit(pipe * adev->gfx.mec.num_queue_per_pipe + queue, in amdgpu_gfx_compute_queue_acquire()
221 adev->gfx.mec.queue_bitmap); in amdgpu_gfx_compute_queue_acquire()
226 set_bit(i, adev->gfx.mec.queue_bitmap); in amdgpu_gfx_compute_queue_acquire()
229 …dev_dbg(adev->dev, "mec queue bitmap weight=%d\n", bitmap_weight(adev->gfx.mec.queue_bitmap, AMDGP… in amdgpu_gfx_compute_queue_acquire()
236 int max_queues_per_me = adev->gfx.me.num_pipe_per_me * in amdgpu_gfx_graphics_queue_acquire()
237 adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_graphics_queue_acquire()
243 pipe = i % adev->gfx.me.num_pipe_per_me; in amdgpu_gfx_graphics_queue_acquire()
244 queue = (i / adev->gfx.me.num_pipe_per_me) % in amdgpu_gfx_graphics_queue_acquire()
245 adev->gfx.me.num_queue_per_pipe; in amdgpu_gfx_graphics_queue_acquire()
247 set_bit(pipe * adev->gfx.me.num_queue_per_pipe + queue, in amdgpu_gfx_graphics_queue_acquire()
248 adev->gfx.me.queue_bitmap); in amdgpu_gfx_graphics_queue_acquire()
252 set_bit(i, adev->gfx.me.queue_bitmap); in amdgpu_gfx_graphics_queue_acquire()
256 adev->gfx.num_gfx_rings = in amdgpu_gfx_graphics_queue_acquire()
257 bitmap_weight(adev->gfx.me.queue_bitmap, AMDGPU_MAX_GFX_QUEUES); in amdgpu_gfx_graphics_queue_acquire()
266 queue_bit = adev->gfx.mec.num_mec in amdgpu_gfx_kiq_acquire()
267 * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_kiq_acquire()
268 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_kiq_acquire()
271 if (test_bit(queue_bit, adev->gfx.mec.queue_bitmap)) in amdgpu_gfx_kiq_acquire()
299 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_init_ring()
331 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_fini()
341 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_kiq_init()
370 ring = &adev->gfx.kiq.ring; in amdgpu_gfx_mqd_sw_init()
389 adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS] = kmalloc(mqd_size, GFP_KERNEL); in amdgpu_gfx_mqd_sw_init()
390 if (!adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS]) in amdgpu_gfx_mqd_sw_init()
396 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_mqd_sw_init()
397 ring = &adev->gfx.gfx_ring[i]; in amdgpu_gfx_mqd_sw_init()
408 adev->gfx.me.mqd_backup[i] = kmalloc(mqd_size, GFP_KERNEL); in amdgpu_gfx_mqd_sw_init()
409 if (!adev->gfx.me.mqd_backup[i]) in amdgpu_gfx_mqd_sw_init()
416 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mqd_sw_init()
417 ring = &adev->gfx.compute_ring[i]; in amdgpu_gfx_mqd_sw_init()
428 adev->gfx.mec.mqd_backup[i] = kmalloc(mqd_size, GFP_KERNEL); in amdgpu_gfx_mqd_sw_init()
429 if (!adev->gfx.mec.mqd_backup[i]) in amdgpu_gfx_mqd_sw_init()
443 for (i = 0; i < adev->gfx.num_gfx_rings; i++) { in amdgpu_gfx_mqd_sw_fini()
444 ring = &adev->gfx.gfx_ring[i]; in amdgpu_gfx_mqd_sw_fini()
445 kfree(adev->gfx.me.mqd_backup[i]); in amdgpu_gfx_mqd_sw_fini()
452 for (i = 0; i < adev->gfx.num_compute_rings; i++) { in amdgpu_gfx_mqd_sw_fini()
453 ring = &adev->gfx.compute_ring[i]; in amdgpu_gfx_mqd_sw_fini()
454 kfree(adev->gfx.mec.mqd_backup[i]); in amdgpu_gfx_mqd_sw_fini()
460 ring = &adev->gfx.kiq.ring; in amdgpu_gfx_mqd_sw_fini()
461 kfree(adev->gfx.mec.mqd_backup[AMDGPU_MAX_COMPUTE_RINGS]); in amdgpu_gfx_mqd_sw_fini()
469 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_disable_kcq()
476 spin_lock(&adev->gfx.kiq.ring_lock); in amdgpu_gfx_disable_kcq()
478 adev->gfx.num_compute_rings)) { in amdgpu_gfx_disable_kcq()
479 spin_unlock(&adev->gfx.kiq.ring_lock); in amdgpu_gfx_disable_kcq()
483 for (i = 0; i < adev->gfx.num_compute_rings; i++) in amdgpu_gfx_disable_kcq()
484 kiq->pmf->kiq_unmap_queues(kiq_ring, &adev->gfx.compute_ring[i], in amdgpu_gfx_disable_kcq()
487 if (adev->gfx.kiq.ring.sched.ready && !adev->job_hang) in amdgpu_gfx_disable_kcq()
489 spin_unlock(&adev->gfx.kiq.ring_lock); in amdgpu_gfx_disable_kcq()
509 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_gfx_enable_kcq()
510 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in amdgpu_gfx_enable_kcq()
518 if (!test_bit(i, adev->gfx.mec.queue_bitmap)) in amdgpu_gfx_enable_kcq()
534 spin_lock(&adev->gfx.kiq.ring_lock); in amdgpu_gfx_enable_kcq()
536 adev->gfx.num_compute_rings + in amdgpu_gfx_enable_kcq()
540 spin_unlock(&adev->gfx.kiq.ring_lock); in amdgpu_gfx_enable_kcq()
548 for (i = 0; i < adev->gfx.num_compute_rings; i++) in amdgpu_gfx_enable_kcq()
549 kiq->pmf->kiq_map_queues(kiq_ring, &adev->gfx.compute_ring[i]); in amdgpu_gfx_enable_kcq()
552 spin_unlock(&adev->gfx.kiq.ring_lock); in amdgpu_gfx_enable_kcq()
577 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_gfx_off_ctrl()
584 if (WARN_ON_ONCE(adev->gfx.gfx_off_req_count == 0)) in amdgpu_gfx_off_ctrl()
587 adev->gfx.gfx_off_req_count--; in amdgpu_gfx_off_ctrl()
589 if (adev->gfx.gfx_off_req_count == 0 && in amdgpu_gfx_off_ctrl()
590 !adev->gfx.gfx_off_state) { in amdgpu_gfx_off_ctrl()
595 adev->gfx.gfx_off_state = true; in amdgpu_gfx_off_ctrl()
597 schedule_delayed_work(&adev->gfx.gfx_off_delay_work, in amdgpu_gfx_off_ctrl()
602 if (adev->gfx.gfx_off_req_count == 0) { in amdgpu_gfx_off_ctrl()
603 cancel_delayed_work_sync(&adev->gfx.gfx_off_delay_work); in amdgpu_gfx_off_ctrl()
605 if (adev->gfx.gfx_off_state && in amdgpu_gfx_off_ctrl()
607 adev->gfx.gfx_off_state = false; in amdgpu_gfx_off_ctrl()
609 if (adev->gfx.funcs->init_spm_golden) { in amdgpu_gfx_off_ctrl()
617 adev->gfx.gfx_off_req_count++; in amdgpu_gfx_off_ctrl()
621 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_gfx_off_ctrl()
628 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_set_gfx_off_residency()
632 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_set_gfx_off_residency()
641 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_residency()
645 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_residency()
654 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_entrycount()
658 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_entrycount()
668 mutex_lock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_status()
672 mutex_unlock(&adev->gfx.gfx_off_mutex); in amdgpu_get_gfx_off_status()
689 r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0); in amdgpu_gfx_ras_late_init()
710 if (!adev->gfx.ras) in amdgpu_gfx_ras_sw_init()
713 ras = adev->gfx.ras; in amdgpu_gfx_ras_sw_init()
724 adev->gfx.ras_if = &ras->ras_block.ras_comm; in amdgpu_gfx_ras_sw_init()
740 if (adev->gfx.ras && adev->gfx.ras->poison_consumption_handler) in amdgpu_gfx_poison_consumption_handler()
741 return adev->gfx.ras->poison_consumption_handler(adev, entry); in amdgpu_gfx_poison_consumption_handler()
758 if (adev->gfx.ras && adev->gfx.ras->ras_block.hw_ops && in amdgpu_gfx_process_ras_data_cb()
759 adev->gfx.ras->ras_block.hw_ops->query_ras_error_count) in amdgpu_gfx_process_ras_data_cb()
760 adev->gfx.ras->ras_block.hw_ops->query_ras_error_count(adev, err_data); in amdgpu_gfx_process_ras_data_cb()
770 struct ras_common_if *ras_if = adev->gfx.ras_if; in amdgpu_gfx_cp_ecc_error_irq()
790 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_kiq_rreg()
858 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in amdgpu_kiq_wreg()
936 adev->gfx.pfp_fw->data; in amdgpu_gfx_cp_init_microcode()
937 adev->gfx.pfp_fw_version = in amdgpu_gfx_cp_init_microcode()
939 adev->gfx.pfp_feature_version = in amdgpu_gfx_cp_init_microcode()
941 ucode_fw = adev->gfx.pfp_fw; in amdgpu_gfx_cp_init_microcode()
946 adev->gfx.pfp_fw->data; in amdgpu_gfx_cp_init_microcode()
947 adev->gfx.pfp_fw_version = in amdgpu_gfx_cp_init_microcode()
949 adev->gfx.pfp_feature_version = in amdgpu_gfx_cp_init_microcode()
951 ucode_fw = adev->gfx.pfp_fw; in amdgpu_gfx_cp_init_microcode()
957 adev->gfx.pfp_fw->data; in amdgpu_gfx_cp_init_microcode()
958 ucode_fw = adev->gfx.pfp_fw; in amdgpu_gfx_cp_init_microcode()
963 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
964 adev->gfx.me_fw_version = in amdgpu_gfx_cp_init_microcode()
966 adev->gfx.me_feature_version = in amdgpu_gfx_cp_init_microcode()
968 ucode_fw = adev->gfx.me_fw; in amdgpu_gfx_cp_init_microcode()
973 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
974 adev->gfx.me_fw_version = in amdgpu_gfx_cp_init_microcode()
976 adev->gfx.me_feature_version = in amdgpu_gfx_cp_init_microcode()
978 ucode_fw = adev->gfx.me_fw; in amdgpu_gfx_cp_init_microcode()
984 adev->gfx.me_fw->data; in amdgpu_gfx_cp_init_microcode()
985 ucode_fw = adev->gfx.me_fw; in amdgpu_gfx_cp_init_microcode()
990 adev->gfx.ce_fw->data; in amdgpu_gfx_cp_init_microcode()
991 adev->gfx.ce_fw_version = in amdgpu_gfx_cp_init_microcode()
993 adev->gfx.ce_feature_version = in amdgpu_gfx_cp_init_microcode()
995 ucode_fw = adev->gfx.ce_fw; in amdgpu_gfx_cp_init_microcode()
1000 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1001 adev->gfx.mec_fw_version = in amdgpu_gfx_cp_init_microcode()
1003 adev->gfx.mec_feature_version = in amdgpu_gfx_cp_init_microcode()
1005 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()
1011 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1012 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()
1017 adev->gfx.mec2_fw->data; in amdgpu_gfx_cp_init_microcode()
1018 adev->gfx.mec2_fw_version = in amdgpu_gfx_cp_init_microcode()
1020 adev->gfx.mec2_feature_version = in amdgpu_gfx_cp_init_microcode()
1022 ucode_fw = adev->gfx.mec2_fw; in amdgpu_gfx_cp_init_microcode()
1028 adev->gfx.mec2_fw->data; in amdgpu_gfx_cp_init_microcode()
1029 ucode_fw = adev->gfx.mec2_fw; in amdgpu_gfx_cp_init_microcode()
1034 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1035 adev->gfx.mec_fw_version = in amdgpu_gfx_cp_init_microcode()
1037 adev->gfx.mec_feature_version = in amdgpu_gfx_cp_init_microcode()
1039 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()
1047 adev->gfx.mec_fw->data; in amdgpu_gfx_cp_init_microcode()
1048 ucode_fw = adev->gfx.mec_fw; in amdgpu_gfx_cp_init_microcode()