Lines Matching refs:ring
126 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs, in amdgpu_ib_schedule() argument
130 struct amdgpu_device *adev = ring->adev; in amdgpu_ib_schedule()
158 if (!ring->sched.ready && !ring->is_mes_queue) { in amdgpu_ib_schedule()
159 dev_err(adev->dev, "couldn't schedule ib on ring <%s>\n", ring->name); in amdgpu_ib_schedule()
163 if (vm && !job->vmid && !ring->is_mes_queue) { in amdgpu_ib_schedule()
169 (!ring->funcs->secure_submission_supported)) { in amdgpu_ib_schedule()
170 dev_err(adev->dev, "secure submissions not supported on ring <%s>\n", ring->name); in amdgpu_ib_schedule()
174 alloc_size = ring->funcs->emit_frame_size + num_ibs * in amdgpu_ib_schedule()
175 ring->funcs->emit_ib_size; in amdgpu_ib_schedule()
177 r = amdgpu_ring_alloc(ring, alloc_size); in amdgpu_ib_schedule()
183 need_ctx_switch = ring->current_ctx != fence_ctx; in amdgpu_ib_schedule()
184 if (ring->funcs->emit_pipeline_sync && job && in amdgpu_ib_schedule()
187 amdgpu_vm_need_pipeline_sync(ring, job))) { in amdgpu_ib_schedule()
196 if ((ib->flags & AMDGPU_IB_FLAG_EMIT_MEM_SYNC) && ring->funcs->emit_mem_sync) in amdgpu_ib_schedule()
197 ring->funcs->emit_mem_sync(ring); in amdgpu_ib_schedule()
199 if (ring->funcs->emit_wave_limit && in amdgpu_ib_schedule()
200 ring->hw_prio == AMDGPU_GFX_PIPE_PRIO_HIGH) in amdgpu_ib_schedule()
201 ring->funcs->emit_wave_limit(ring, true); in amdgpu_ib_schedule()
203 if (ring->funcs->insert_start) in amdgpu_ib_schedule()
204 ring->funcs->insert_start(ring); in amdgpu_ib_schedule()
207 r = amdgpu_vm_flush(ring, job, need_pipe_sync); in amdgpu_ib_schedule()
209 amdgpu_ring_undo(ring); in amdgpu_ib_schedule()
214 amdgpu_ring_ib_begin(ring); in amdgpu_ib_schedule()
215 if (job && ring->funcs->init_cond_exec) in amdgpu_ib_schedule()
216 patch_offset = amdgpu_ring_init_cond_exec(ring); in amdgpu_ib_schedule()
218 amdgpu_device_flush_hdp(adev, ring); in amdgpu_ib_schedule()
223 if (job && ring->funcs->emit_cntxcntl) { in amdgpu_ib_schedule()
226 amdgpu_ring_emit_cntxcntl(ring, status); in amdgpu_ib_schedule()
232 if (job && ring->funcs->emit_frame_cntl) { in amdgpu_ib_schedule()
234 amdgpu_ring_emit_frame_cntl(ring, true, secure); in amdgpu_ib_schedule()
240 if (job && ring->funcs->emit_frame_cntl) { in amdgpu_ib_schedule()
242 amdgpu_ring_emit_frame_cntl(ring, false, secure); in amdgpu_ib_schedule()
244 amdgpu_ring_emit_frame_cntl(ring, true, secure); in amdgpu_ib_schedule()
248 amdgpu_ring_emit_ib(ring, job, ib, status); in amdgpu_ib_schedule()
252 if (job && ring->funcs->emit_frame_cntl) in amdgpu_ib_schedule()
253 amdgpu_ring_emit_frame_cntl(ring, false, secure); in amdgpu_ib_schedule()
255 amdgpu_device_invalidate_hdp(adev, ring); in amdgpu_ib_schedule()
262 amdgpu_ring_emit_fence(ring, job->uf_addr, job->uf_sequence, in amdgpu_ib_schedule()
266 r = amdgpu_fence_emit(ring, f, job, fence_flags); in amdgpu_ib_schedule()
270 amdgpu_vmid_reset(adev, ring->funcs->vmhub, job->vmid); in amdgpu_ib_schedule()
271 amdgpu_ring_undo(ring); in amdgpu_ib_schedule()
275 if (ring->funcs->insert_end) in amdgpu_ib_schedule()
276 ring->funcs->insert_end(ring); in amdgpu_ib_schedule()
278 if (patch_offset != ~0 && ring->funcs->patch_cond_exec) in amdgpu_ib_schedule()
279 amdgpu_ring_patch_cond_exec(ring, patch_offset); in amdgpu_ib_schedule()
281 ring->current_ctx = fence_ctx; in amdgpu_ib_schedule()
282 if (vm && ring->funcs->emit_switch_buffer) in amdgpu_ib_schedule()
283 amdgpu_ring_emit_switch_buffer(ring); in amdgpu_ib_schedule()
285 if (ring->funcs->emit_wave_limit && in amdgpu_ib_schedule()
286 ring->hw_prio == AMDGPU_GFX_PIPE_PRIO_HIGH) in amdgpu_ib_schedule()
287 ring->funcs->emit_wave_limit(ring, false); in amdgpu_ib_schedule()
289 amdgpu_ring_ib_end(ring); in amdgpu_ib_schedule()
290 amdgpu_ring_commit(ring); in amdgpu_ib_schedule()
386 struct amdgpu_ring *ring = adev->rings[i]; in amdgpu_ib_ring_tests() local
392 if (!ring->sched.ready || !ring->funcs->test_ib) in amdgpu_ib_ring_tests()
396 ring->funcs->type == AMDGPU_RING_TYPE_KIQ) in amdgpu_ib_ring_tests()
400 if (ring->funcs->type == AMDGPU_RING_TYPE_UVD || in amdgpu_ib_ring_tests()
401 ring->funcs->type == AMDGPU_RING_TYPE_VCE || in amdgpu_ib_ring_tests()
402 ring->funcs->type == AMDGPU_RING_TYPE_UVD_ENC || in amdgpu_ib_ring_tests()
403 ring->funcs->type == AMDGPU_RING_TYPE_VCN_DEC || in amdgpu_ib_ring_tests()
404 ring->funcs->type == AMDGPU_RING_TYPE_VCN_ENC || in amdgpu_ib_ring_tests()
405 ring->funcs->type == AMDGPU_RING_TYPE_VCN_JPEG) in amdgpu_ib_ring_tests()
410 r = amdgpu_ring_test_ib(ring, tmo); in amdgpu_ib_ring_tests()
413 ring->name); in amdgpu_ib_ring_tests()
417 ring->sched.ready = false; in amdgpu_ib_ring_tests()
419 ring->name, r); in amdgpu_ib_ring_tests()
421 if (ring == &adev->gfx.gfx_ring[0]) { in amdgpu_ib_ring_tests()