Lines Matching refs:gfx
225 fw_info->ver = adev->gfx.me_fw_version; in amdgpu_firmware_info()
226 fw_info->feature = adev->gfx.me_feature_version; in amdgpu_firmware_info()
229 fw_info->ver = adev->gfx.pfp_fw_version; in amdgpu_firmware_info()
230 fw_info->feature = adev->gfx.pfp_feature_version; in amdgpu_firmware_info()
233 fw_info->ver = adev->gfx.ce_fw_version; in amdgpu_firmware_info()
234 fw_info->feature = adev->gfx.ce_feature_version; in amdgpu_firmware_info()
237 fw_info->ver = adev->gfx.rlc_fw_version; in amdgpu_firmware_info()
238 fw_info->feature = adev->gfx.rlc_feature_version; in amdgpu_firmware_info()
241 fw_info->ver = adev->gfx.rlc_srlc_fw_version; in amdgpu_firmware_info()
242 fw_info->feature = adev->gfx.rlc_srlc_feature_version; in amdgpu_firmware_info()
245 fw_info->ver = adev->gfx.rlc_srlg_fw_version; in amdgpu_firmware_info()
246 fw_info->feature = adev->gfx.rlc_srlg_feature_version; in amdgpu_firmware_info()
249 fw_info->ver = adev->gfx.rlc_srls_fw_version; in amdgpu_firmware_info()
250 fw_info->feature = adev->gfx.rlc_srls_feature_version; in amdgpu_firmware_info()
253 fw_info->ver = adev->gfx.rlcp_ucode_version; in amdgpu_firmware_info()
254 fw_info->feature = adev->gfx.rlcp_ucode_feature_version; in amdgpu_firmware_info()
257 fw_info->ver = adev->gfx.rlcv_ucode_version; in amdgpu_firmware_info()
258 fw_info->feature = adev->gfx.rlcv_ucode_feature_version; in amdgpu_firmware_info()
262 fw_info->ver = adev->gfx.mec_fw_version; in amdgpu_firmware_info()
263 fw_info->feature = adev->gfx.mec_feature_version; in amdgpu_firmware_info()
265 fw_info->ver = adev->gfx.mec2_fw_version; in amdgpu_firmware_info()
266 fw_info->feature = adev->gfx.mec2_feature_version; in amdgpu_firmware_info()
352 fw_info->ver = adev->gfx.imu_fw_version; in amdgpu_firmware_info()
377 for (i = 0; i < adev->gfx.num_gfx_rings; i++) in amdgpu_hw_ip_info()
378 if (adev->gfx.gfx_ring[i].sched.ready) in amdgpu_hw_ip_info()
385 for (i = 0; i < adev->gfx.num_compute_rings; i++) in amdgpu_hw_ip_info()
386 if (adev->gfx.compute_ring[i].sched.ready) in amdgpu_hw_ip_info()
783 dev_info->num_shader_engines = adev->gfx.config.max_shader_engines; in amdgpu_info_ioctl()
784 dev_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se; in amdgpu_info_ioctl()
800 dev_info->enabled_rb_pipes_mask = adev->gfx.config.backend_enable_mask; in amdgpu_info_ioctl()
801 dev_info->num_rb_pipes = adev->gfx.config.max_backends_per_se * in amdgpu_info_ioctl()
802 adev->gfx.config.max_shader_engines; in amdgpu_info_ioctl()
803 dev_info->num_hw_gfx_contexts = adev->gfx.config.max_hw_contexts; in amdgpu_info_ioctl()
811 if (adev->gfx.config.ta_cntl2_truncate_coord_mode) in amdgpu_info_ioctl()
833 dev_info->cu_active_number = adev->gfx.cu_info.number; in amdgpu_info_ioctl()
834 dev_info->cu_ao_mask = adev->gfx.cu_info.ao_cu_mask; in amdgpu_info_ioctl()
835 dev_info->ce_ram_size = adev->gfx.ce_ram_size; in amdgpu_info_ioctl()
836 memcpy(&dev_info->cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0], in amdgpu_info_ioctl()
837 sizeof(adev->gfx.cu_info.ao_cu_bitmap)); in amdgpu_info_ioctl()
838 memcpy(&dev_info->cu_bitmap[0], &adev->gfx.cu_info.bitmap[0], in amdgpu_info_ioctl()
839 sizeof(adev->gfx.cu_info.bitmap)); in amdgpu_info_ioctl()
844 adev->gfx.config.double_offchip_lds_buf; in amdgpu_info_ioctl()
845 dev_info->wave_front_size = adev->gfx.cu_info.wave_front_size; in amdgpu_info_ioctl()
846 dev_info->num_shader_visible_vgprs = adev->gfx.config.max_gprs; in amdgpu_info_ioctl()
847 dev_info->num_cu_per_sh = adev->gfx.config.max_cu_per_sh; in amdgpu_info_ioctl()
848 dev_info->num_tcc_blocks = adev->gfx.config.max_texture_channel_caches; in amdgpu_info_ioctl()
849 dev_info->gs_vgt_table_depth = adev->gfx.config.gs_vgt_table_depth; in amdgpu_info_ioctl()
850 dev_info->gs_prim_buffer_depth = adev->gfx.config.gs_prim_buffer_depth; in amdgpu_info_ioctl()
851 dev_info->max_gs_waves_per_vgt = adev->gfx.config.max_gs_threads; in amdgpu_info_ioctl()
855 adev->gfx.config.pa_sc_tile_steering_override; in amdgpu_info_ioctl()
857 dev_info->tcc_disabled_mask = adev->gfx.config.tcc_disabled_mask; in amdgpu_info_ioctl()
870 dev_info->tcp_cache_size = adev->gfx.config.gc_tcp_l1_size; in amdgpu_info_ioctl()
871 dev_info->num_sqc_per_wgp = adev->gfx.config.gc_num_sqc_per_wgp; in amdgpu_info_ioctl()
872 dev_info->sqc_data_cache_size = adev->gfx.config.gc_l1_data_cache_size_per_sqc; in amdgpu_info_ioctl()
873 dev_info->sqc_inst_cache_size = adev->gfx.config.gc_l1_instruction_cache_size_per_sqc; in amdgpu_info_ioctl()
874 dev_info->gl1c_cache_size = adev->gfx.config.gc_gl1c_size_per_instance * in amdgpu_info_ioctl()
875 adev->gfx.config.gc_gl1c_per_sa; in amdgpu_info_ioctl()
876 dev_info->gl2c_cache_size = adev->gfx.config.gc_gl2c_per_gpu; in amdgpu_info_ioctl()
1568 if (adev->gfx.mec2_fw) { in amdgpu_debugfs_firmware_info_show()