Lines Matching refs:ring
127 void amdgpu_fence_driver_clear_job_fences(struct amdgpu_ring *ring);
128 void amdgpu_fence_driver_force_completion(struct amdgpu_ring *ring);
130 int amdgpu_fence_driver_init_ring(struct amdgpu_ring *ring);
131 int amdgpu_fence_driver_start_ring(struct amdgpu_ring *ring,
138 int amdgpu_fence_emit(struct amdgpu_ring *ring, struct dma_fence **fence, struct amdgpu_job *job,
140 int amdgpu_fence_emit_polling(struct amdgpu_ring *ring, uint32_t *s,
142 bool amdgpu_fence_process(struct amdgpu_ring *ring);
143 int amdgpu_fence_wait_empty(struct amdgpu_ring *ring);
144 signed long amdgpu_fence_wait_polling(struct amdgpu_ring *ring,
147 unsigned amdgpu_fence_count_emitted(struct amdgpu_ring *ring);
151 u64 amdgpu_fence_last_unsignaled_time_us(struct amdgpu_ring *ring);
152 void amdgpu_fence_update_start_timestamp(struct amdgpu_ring *ring, uint32_t seq,
171 u64 (*get_rptr)(struct amdgpu_ring *ring);
172 u64 (*get_wptr)(struct amdgpu_ring *ring);
173 void (*set_wptr)(struct amdgpu_ring *ring);
185 void (*emit_ib)(struct amdgpu_ring *ring,
189 void (*emit_fence)(struct amdgpu_ring *ring, uint64_t addr,
191 void (*emit_pipeline_sync)(struct amdgpu_ring *ring);
192 void (*emit_vm_flush)(struct amdgpu_ring *ring, unsigned vmid,
194 void (*emit_hdp_flush)(struct amdgpu_ring *ring);
195 void (*emit_gds_switch)(struct amdgpu_ring *ring, uint32_t vmid,
200 int (*test_ring)(struct amdgpu_ring *ring);
201 int (*test_ib)(struct amdgpu_ring *ring, long timeout);
203 void (*insert_nop)(struct amdgpu_ring *ring, uint32_t count);
204 void (*insert_start)(struct amdgpu_ring *ring);
205 void (*insert_end)(struct amdgpu_ring *ring);
207 void (*pad_ib)(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
208 unsigned (*init_cond_exec)(struct amdgpu_ring *ring);
209 void (*patch_cond_exec)(struct amdgpu_ring *ring, unsigned offset);
211 void (*begin_use)(struct amdgpu_ring *ring);
212 void (*end_use)(struct amdgpu_ring *ring);
213 void (*emit_switch_buffer) (struct amdgpu_ring *ring);
214 void (*emit_cntxcntl) (struct amdgpu_ring *ring, uint32_t flags);
215 void (*emit_rreg)(struct amdgpu_ring *ring, uint32_t reg,
217 void (*emit_wreg)(struct amdgpu_ring *ring, uint32_t reg, uint32_t val);
218 void (*emit_reg_wait)(struct amdgpu_ring *ring, uint32_t reg,
220 void (*emit_reg_write_reg_wait)(struct amdgpu_ring *ring,
223 void (*emit_frame_cntl)(struct amdgpu_ring *ring, bool start,
226 void (*soft_recovery)(struct amdgpu_ring *ring, unsigned vmid);
227 int (*preempt_ib)(struct amdgpu_ring *ring);
228 void (*emit_mem_sync)(struct amdgpu_ring *ring);
229 void (*emit_wave_limit)(struct amdgpu_ring *ring, bool enable);
239 volatile uint32_t *ring; member
320 int amdgpu_ring_alloc(struct amdgpu_ring *ring, unsigned ndw);
321 void amdgpu_ring_ib_begin(struct amdgpu_ring *ring);
322 void amdgpu_ring_ib_end(struct amdgpu_ring *ring);
324 void amdgpu_ring_insert_nop(struct amdgpu_ring *ring, uint32_t count);
325 void amdgpu_ring_generic_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib);
326 void amdgpu_ring_commit(struct amdgpu_ring *ring);
327 void amdgpu_ring_undo(struct amdgpu_ring *ring);
328 int amdgpu_ring_init(struct amdgpu_device *adev, struct amdgpu_ring *ring,
332 void amdgpu_ring_fini(struct amdgpu_ring *ring);
333 void amdgpu_ring_emit_reg_write_reg_wait_helper(struct amdgpu_ring *ring,
336 bool amdgpu_ring_soft_recovery(struct amdgpu_ring *ring, unsigned int vmid,
339 static inline void amdgpu_ring_set_preempt_cond_exec(struct amdgpu_ring *ring, in amdgpu_ring_set_preempt_cond_exec() argument
342 *ring->cond_exe_cpu_addr = cond_exec; in amdgpu_ring_set_preempt_cond_exec()
345 static inline void amdgpu_ring_clear_ring(struct amdgpu_ring *ring) in amdgpu_ring_clear_ring() argument
348 while (i <= ring->buf_mask) in amdgpu_ring_clear_ring()
349 ring->ring[i++] = ring->funcs->nop; in amdgpu_ring_clear_ring()
353 static inline void amdgpu_ring_write(struct amdgpu_ring *ring, uint32_t v) in amdgpu_ring_write() argument
355 if (ring->count_dw <= 0) in amdgpu_ring_write()
357 ring->ring[ring->wptr++ & ring->buf_mask] = v; in amdgpu_ring_write()
358 ring->wptr &= ring->ptr_mask; in amdgpu_ring_write()
359 ring->count_dw--; in amdgpu_ring_write()
362 static inline void amdgpu_ring_write_multiple(struct amdgpu_ring *ring, in amdgpu_ring_write_multiple() argument
368 if (unlikely(ring->count_dw < count_dw)) in amdgpu_ring_write_multiple()
371 occupied = ring->wptr & ring->buf_mask; in amdgpu_ring_write_multiple()
372 dst = (void *)&ring->ring[occupied]; in amdgpu_ring_write_multiple()
373 chunk1 = ring->buf_mask + 1 - occupied; in amdgpu_ring_write_multiple()
384 dst = (void *)ring->ring; in amdgpu_ring_write_multiple()
388 ring->wptr += count_dw; in amdgpu_ring_write_multiple()
389 ring->wptr &= ring->ptr_mask; in amdgpu_ring_write_multiple()
390 ring->count_dw -= count_dw; in amdgpu_ring_write_multiple()
393 #define amdgpu_mes_ctx_get_offs_gpu_addr(ring, offset) \ argument
394 (ring->is_mes_queue && ring->mes_ctx ? \
395 (ring->mes_ctx->meta_data_gpu_addr + offset) : 0)
397 #define amdgpu_mes_ctx_get_offs_cpu_addr(ring, offset) \ argument
398 (ring->is_mes_queue && ring->mes_ctx ? \
399 (void *)((uint8_t *)(ring->mes_ctx->meta_data_ptr) + offset) : \
402 int amdgpu_ring_test_helper(struct amdgpu_ring *ring);
405 struct amdgpu_ring *ring);
407 int amdgpu_ring_init_mqd(struct amdgpu_ring *ring);
426 int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,