Lines Matching refs:ib
222 struct amdgpu_ib *ib, in cik_sdma_ring_emit_ib() argument
232 amdgpu_ring_write(ring, ib->gpu_addr & 0xffffffe0); /* base must be 32 byte aligned */ in cik_sdma_ring_emit_ib()
233 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xffffffff); in cik_sdma_ring_emit_ib()
234 amdgpu_ring_write(ring, ib->length_dw); in cik_sdma_ring_emit_ib()
660 struct amdgpu_ib ib; in cik_sdma_ring_test_ib() local
674 memset(&ib, 0, sizeof(ib)); in cik_sdma_ring_test_ib()
676 AMDGPU_IB_POOL_DIRECT, &ib); in cik_sdma_ring_test_ib()
680 ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, in cik_sdma_ring_test_ib()
682 ib.ptr[1] = lower_32_bits(gpu_addr); in cik_sdma_ring_test_ib()
683 ib.ptr[2] = upper_32_bits(gpu_addr); in cik_sdma_ring_test_ib()
684 ib.ptr[3] = 1; in cik_sdma_ring_test_ib()
685 ib.ptr[4] = 0xDEADBEEF; in cik_sdma_ring_test_ib()
686 ib.length_dw = 5; in cik_sdma_ring_test_ib()
687 r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); in cik_sdma_ring_test_ib()
705 amdgpu_ib_free(adev, &ib, NULL); in cik_sdma_ring_test_ib()
722 static void cik_sdma_vm_copy_pte(struct amdgpu_ib *ib, in cik_sdma_vm_copy_pte() argument
728 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, in cik_sdma_vm_copy_pte()
730 ib->ptr[ib->length_dw++] = bytes; in cik_sdma_vm_copy_pte()
731 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in cik_sdma_vm_copy_pte()
732 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cik_sdma_vm_copy_pte()
733 ib->ptr[ib->length_dw++] = upper_32_bits(src); in cik_sdma_vm_copy_pte()
734 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cik_sdma_vm_copy_pte()
735 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_copy_pte()
749 static void cik_sdma_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe, in cik_sdma_vm_write_pte() argument
755 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in cik_sdma_vm_write_pte()
757 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cik_sdma_vm_write_pte()
758 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_write_pte()
759 ib->ptr[ib->length_dw++] = ndw; in cik_sdma_vm_write_pte()
761 ib->ptr[ib->length_dw++] = lower_32_bits(value); in cik_sdma_vm_write_pte()
762 ib->ptr[ib->length_dw++] = upper_32_bits(value); in cik_sdma_vm_write_pte()
779 static void cik_sdma_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe, in cik_sdma_vm_set_pte_pde() argument
784 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_GENERATE_PTE_PDE, 0, 0); in cik_sdma_vm_set_pte_pde()
785 ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */ in cik_sdma_vm_set_pte_pde()
786 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_set_pte_pde()
787 ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */ in cik_sdma_vm_set_pte_pde()
788 ib->ptr[ib->length_dw++] = upper_32_bits(flags); in cik_sdma_vm_set_pte_pde()
789 ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */ in cik_sdma_vm_set_pte_pde()
790 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in cik_sdma_vm_set_pte_pde()
791 ib->ptr[ib->length_dw++] = incr; /* increment size */ in cik_sdma_vm_set_pte_pde()
792 ib->ptr[ib->length_dw++] = 0; in cik_sdma_vm_set_pte_pde()
793 ib->ptr[ib->length_dw++] = count; /* number of entries */ in cik_sdma_vm_set_pte_pde()
803 static void cik_sdma_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in cik_sdma_ring_pad_ib() argument
809 pad_count = (-ib->length_dw) & 7; in cik_sdma_ring_pad_ib()
812 ib->ptr[ib->length_dw++] = in cik_sdma_ring_pad_ib()
816 ib->ptr[ib->length_dw++] = in cik_sdma_ring_pad_ib()
1307 static void cik_sdma_emit_copy_buffer(struct amdgpu_ib *ib, in cik_sdma_emit_copy_buffer() argument
1313 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, SDMA_COPY_SUB_OPCODE_LINEAR, 0); in cik_sdma_emit_copy_buffer()
1314 ib->ptr[ib->length_dw++] = byte_count; in cik_sdma_emit_copy_buffer()
1315 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in cik_sdma_emit_copy_buffer()
1316 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in cik_sdma_emit_copy_buffer()
1317 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset); in cik_sdma_emit_copy_buffer()
1318 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in cik_sdma_emit_copy_buffer()
1319 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in cik_sdma_emit_copy_buffer()
1332 static void cik_sdma_emit_fill_buffer(struct amdgpu_ib *ib, in cik_sdma_emit_fill_buffer() argument
1337 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_CONSTANT_FILL, 0, 0); in cik_sdma_emit_fill_buffer()
1338 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in cik_sdma_emit_fill_buffer()
1339 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in cik_sdma_emit_fill_buffer()
1340 ib->ptr[ib->length_dw++] = src_data; in cik_sdma_emit_fill_buffer()
1341 ib->ptr[ib->length_dw++] = byte_count; in cik_sdma_emit_fill_buffer()