Lines Matching refs:mec
4200 amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); in gfx_v10_0_mec_fini()
4201 amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL); in gfx_v10_0_mec_fini()
4222 bitmap_zero(adev->gfx.mec.queue_bitmap, AMDGPU_MAX_COMPUTE_QUEUES); in gfx_v10_0_mec_init()
4231 &adev->gfx.mec.hpd_eop_obj, in gfx_v10_0_mec_init()
4232 &adev->gfx.mec.hpd_eop_gpu_addr, in gfx_v10_0_mec_init()
4242 amdgpu_bo_kunmap(adev->gfx.mec.hpd_eop_obj); in gfx_v10_0_mec_init()
4243 amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); in gfx_v10_0_mec_init()
4255 &adev->gfx.mec.mec_fw_obj, in gfx_v10_0_mec_init()
4256 &adev->gfx.mec.mec_fw_gpu_addr, in gfx_v10_0_mec_init()
4266 amdgpu_bo_kunmap(adev->gfx.mec.mec_fw_obj); in gfx_v10_0_mec_init()
4267 amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj); in gfx_v10_0_mec_init()
4474 int mec, int pipe, int queue) in gfx_v10_0_compute_ring_init() argument
4483 ring->me = mec + 1; in gfx_v10_0_compute_ring_init()
4490 ring->eop_gpu_addr = adev->gfx.mec.hpd_eop_gpu_addr in gfx_v10_0_compute_ring_init()
4495 + ((ring->me - 1) * adev->gfx.mec.num_pipe_per_mec) in gfx_v10_0_compute_ring_init()
4519 adev->gfx.mec.num_mec = 2; in gfx_v10_0_sw_init()
4520 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4521 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v10_0_sw_init()
4534 adev->gfx.mec.num_mec = 2; in gfx_v10_0_sw_init()
4535 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4536 adev->gfx.mec.num_queue_per_pipe = 4; in gfx_v10_0_sw_init()
4542 adev->gfx.mec.num_mec = 1; in gfx_v10_0_sw_init()
4543 adev->gfx.mec.num_pipe_per_mec = 4; in gfx_v10_0_sw_init()
4544 adev->gfx.mec.num_queue_per_pipe = 8; in gfx_v10_0_sw_init()
4612 for (i = 0; i < adev->gfx.mec.num_mec; ++i) { in gfx_v10_0_sw_init()
4613 for (j = 0; j < adev->gfx.mec.num_queue_per_pipe; j++) { in gfx_v10_0_sw_init()
4614 for (k = 0; k < adev->gfx.mec.num_pipe_per_mec; k++) { in gfx_v10_0_sw_init()
6268 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_LO, adev->gfx.mec.mec_fw_gpu_addr & in gfx_v10_0_cp_compute_load_microcode()
6271 upper_32_bits(adev->gfx.mec.mec_fw_gpu_addr)); in gfx_v10_0_cp_compute_load_microcode()
6819 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v10_0_kiq_init_queue()
6820 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd)); in gfx_v10_0_kiq_init_queue()
6842 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v10_0_kiq_init_queue()
6843 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd)); in gfx_v10_0_kiq_init_queue()
6863 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v10_0_kcq_init_queue()
6864 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd)); in gfx_v10_0_kcq_init_queue()
6867 if (adev->gfx.mec.mqd_backup[mqd_idx]) in gfx_v10_0_kcq_init_queue()
6868 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd)); in gfx_v10_0_kcq_init_queue()