Lines Matching refs:mqd
2855 struct cik_mqd *mqd, in gfx_v7_0_mqd_init() argument
2863 memset(mqd, 0, sizeof(struct cik_mqd)); in gfx_v7_0_mqd_init()
2865 mqd->header = 0xC0310800; in gfx_v7_0_mqd_init()
2866 mqd->compute_static_thread_mgmt_se0 = 0xffffffff; in gfx_v7_0_mqd_init()
2867 mqd->compute_static_thread_mgmt_se1 = 0xffffffff; in gfx_v7_0_mqd_init()
2868 mqd->compute_static_thread_mgmt_se2 = 0xffffffff; in gfx_v7_0_mqd_init()
2869 mqd->compute_static_thread_mgmt_se3 = 0xffffffff; in gfx_v7_0_mqd_init()
2872 mqd->cp_hqd_pq_doorbell_control = in gfx_v7_0_mqd_init()
2875 mqd->cp_hqd_pq_doorbell_control |= CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK; in gfx_v7_0_mqd_init()
2877 mqd->cp_hqd_pq_doorbell_control &= ~CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_EN_MASK; in gfx_v7_0_mqd_init()
2880 mqd->cp_mqd_base_addr_lo = mqd_gpu_addr & 0xfffffffc; in gfx_v7_0_mqd_init()
2881 mqd->cp_mqd_base_addr_hi = upper_32_bits(mqd_gpu_addr); in gfx_v7_0_mqd_init()
2884 mqd->cp_mqd_control = RREG32(mmCP_MQD_CONTROL); in gfx_v7_0_mqd_init()
2885 mqd->cp_mqd_control &= ~CP_MQD_CONTROL__VMID_MASK; in gfx_v7_0_mqd_init()
2889 mqd->cp_hqd_pq_base_lo = hqd_gpu_addr; in gfx_v7_0_mqd_init()
2890 mqd->cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); in gfx_v7_0_mqd_init()
2893 mqd->cp_hqd_pq_control = RREG32(mmCP_HQD_PQ_CONTROL); in gfx_v7_0_mqd_init()
2894 mqd->cp_hqd_pq_control &= in gfx_v7_0_mqd_init()
2898 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()
2900 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()
2903 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()
2906 mqd->cp_hqd_pq_control &= in gfx_v7_0_mqd_init()
2910 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()
2916 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v7_0_mqd_init()
2917 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v7_0_mqd_init()
2921 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v7_0_mqd_init()
2922 mqd->cp_hqd_pq_rptr_report_addr_hi = in gfx_v7_0_mqd_init()
2927 mqd->cp_hqd_pq_doorbell_control = in gfx_v7_0_mqd_init()
2929 mqd->cp_hqd_pq_doorbell_control &= in gfx_v7_0_mqd_init()
2931 mqd->cp_hqd_pq_doorbell_control |= in gfx_v7_0_mqd_init()
2934 mqd->cp_hqd_pq_doorbell_control |= in gfx_v7_0_mqd_init()
2936 mqd->cp_hqd_pq_doorbell_control &= in gfx_v7_0_mqd_init()
2941 mqd->cp_hqd_pq_doorbell_control = 0; in gfx_v7_0_mqd_init()
2946 mqd->cp_hqd_pq_wptr = lower_32_bits(ring->wptr); in gfx_v7_0_mqd_init()
2947 mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR); in gfx_v7_0_mqd_init()
2950 mqd->cp_hqd_vmid = 0; in gfx_v7_0_mqd_init()
2953 mqd->cp_hqd_ib_control = RREG32(mmCP_HQD_IB_CONTROL); in gfx_v7_0_mqd_init()
2954 mqd->cp_hqd_ib_base_addr_lo = RREG32(mmCP_HQD_IB_BASE_ADDR); in gfx_v7_0_mqd_init()
2955 mqd->cp_hqd_ib_base_addr_hi = RREG32(mmCP_HQD_IB_BASE_ADDR_HI); in gfx_v7_0_mqd_init()
2956 mqd->cp_hqd_ib_rptr = RREG32(mmCP_HQD_IB_RPTR); in gfx_v7_0_mqd_init()
2957 mqd->cp_hqd_persistent_state = RREG32(mmCP_HQD_PERSISTENT_STATE); in gfx_v7_0_mqd_init()
2958 mqd->cp_hqd_sema_cmd = RREG32(mmCP_HQD_SEMA_CMD); in gfx_v7_0_mqd_init()
2959 mqd->cp_hqd_msg_type = RREG32(mmCP_HQD_MSG_TYPE); in gfx_v7_0_mqd_init()
2960 mqd->cp_hqd_atomic0_preop_lo = RREG32(mmCP_HQD_ATOMIC0_PREOP_LO); in gfx_v7_0_mqd_init()
2961 mqd->cp_hqd_atomic0_preop_hi = RREG32(mmCP_HQD_ATOMIC0_PREOP_HI); in gfx_v7_0_mqd_init()
2962 mqd->cp_hqd_atomic1_preop_lo = RREG32(mmCP_HQD_ATOMIC1_PREOP_LO); in gfx_v7_0_mqd_init()
2963 mqd->cp_hqd_atomic1_preop_hi = RREG32(mmCP_HQD_ATOMIC1_PREOP_HI); in gfx_v7_0_mqd_init()
2964 mqd->cp_hqd_pq_rptr = RREG32(mmCP_HQD_PQ_RPTR); in gfx_v7_0_mqd_init()
2965 mqd->cp_hqd_quantum = RREG32(mmCP_HQD_QUANTUM); in gfx_v7_0_mqd_init()
2966 mqd->cp_hqd_pipe_priority = RREG32(mmCP_HQD_PIPE_PRIORITY); in gfx_v7_0_mqd_init()
2967 mqd->cp_hqd_queue_priority = RREG32(mmCP_HQD_QUEUE_PRIORITY); in gfx_v7_0_mqd_init()
2968 mqd->cp_hqd_iq_rptr = RREG32(mmCP_HQD_IQ_RPTR); in gfx_v7_0_mqd_init()
2971 mqd->cp_hqd_active = 1; in gfx_v7_0_mqd_init()
2974 static int gfx_v7_0_mqd_commit(struct amdgpu_device *adev, struct cik_mqd *mqd) in gfx_v7_0_mqd_commit() argument
2981 mqd_data = &mqd->cp_mqd_base_addr_lo; in gfx_v7_0_mqd_commit()
3003 struct cik_mqd *mqd; in gfx_v7_0_compute_queue_init() local
3008 &mqd_gpu_addr, (void **)&mqd); in gfx_v7_0_compute_queue_init()
3017 gfx_v7_0_mqd_init(adev, mqd, mqd_gpu_addr, ring); in gfx_v7_0_compute_queue_init()
3019 gfx_v7_0_mqd_commit(adev, mqd); in gfx_v7_0_compute_queue_init()