Lines Matching refs:PACKET3
769 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx_v9_0_kiq_set_resources()
791 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in gfx_v9_0_kiq_map_queues()
821 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_UNMAP_QUEUES, 4)); in gfx_v9_0_kiq_unmap_queues()
849 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_QUERY_STATUS, 5)); in gfx_v9_0_kiq_query_status()
868 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_INVALIDATE_TLBS, 0)); in gfx_v9_0_kiq_invalidate_tlbs()
961 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_write_data_to_reg()
975 amdgpu_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5)); in gfx_v9_0_wait_reg_mem()
1005 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1)); in gfx_v9_0_ring_test_ring()
1045 ib.ptr[0] = PACKET3(PACKET3_WRITE_DATA, 3); in gfx_v9_0_ring_test_ib()
1447 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v9_0_get_csb_buffer()
1450 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_get_csb_buffer()
1458 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count)); in gfx_v9_0_get_csb_buffer()
1469 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v9_0_get_csb_buffer()
1472 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v9_0_get_csb_buffer()
3025 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v9_0_cp_gfx_start()
3028 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_0_cp_gfx_start()
3036 PACKET3(PACKET3_SET_CONTEXT_REG, in gfx_v9_0_cp_gfx_start()
3046 amdgpu_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); in gfx_v9_0_cp_gfx_start()
3049 amdgpu_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0)); in gfx_v9_0_cp_gfx_start()
3052 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); in gfx_v9_0_cp_gfx_start()
3057 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG,1)); in gfx_v9_0_cp_gfx_start()
3914 amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4)); in gfx_v9_0_kiq_read_clock()
4292 amdgpu_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5)); in gfx_v9_0_do_edc_gds_workarounds()
4390 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v9_0_do_edc_gpr_workarounds()
4397 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v9_0_do_edc_gpr_workarounds()
4404 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); in gfx_v9_0_do_edc_gpr_workarounds()
4412 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); in gfx_v9_0_do_edc_gpr_workarounds()
4418 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v9_0_do_edc_gpr_workarounds()
4425 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v9_0_do_edc_gpr_workarounds()
4432 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); in gfx_v9_0_do_edc_gpr_workarounds()
4440 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); in gfx_v9_0_do_edc_gpr_workarounds()
4446 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v9_0_do_edc_gpr_workarounds()
4453 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v9_0_do_edc_gpr_workarounds()
4460 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); in gfx_v9_0_do_edc_gpr_workarounds()
4468 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_EVENT_WRITE, 0); in gfx_v9_0_do_edc_gpr_workarounds()
5108 header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2); in gfx_v9_0_ring_emit_ib_gfx()
5110 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2); in gfx_v9_0_ring_emit_ib_gfx()
5157 amdgpu_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1)); in gfx_v9_0_ring_emit_ib_compute()
5162 amdgpu_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); in gfx_v9_0_ring_emit_ib_compute()
5183 amdgpu_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 6)); in gfx_v9_0_ring_emit_fence()
5233 amdgpu_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0)); in gfx_v9_0_ring_emit_vm_flush()
5277 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_ring_emit_fence_kiq()
5286 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_ring_emit_fence_kiq()
5297 amdgpu_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0)); in gfx_v9_ring_emit_sb()
5325 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v9_0_ring_emit_ce_meta()
5434 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, cnt)); in gfx_v9_0_ring_emit_de_meta()
5455 amdgpu_ring_write(ring, PACKET3(PACKET3_FRAME_CONTROL, 0)); in gfx_v9_0_ring_emit_frame_cntl()
5487 amdgpu_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1)); in gfx_v9_ring_emit_cntxcntl()
5495 amdgpu_ring_write(ring, PACKET3(PACKET3_COND_EXEC, 3)); in gfx_v9_0_ring_emit_init_cond_exec()
5522 amdgpu_ring_write(ring, PACKET3(PACKET3_COPY_DATA, 4)); in gfx_v9_0_ring_emit_rreg()
5550 amdgpu_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3)); in gfx_v9_0_ring_emit_wreg()
6661 amdgpu_ring_write(ring, PACKET3(PACKET3_ACQUIRE_MEM, 5)); in gfx_v9_0_emit_mem_sync()
6750 .nop = PACKET3(PACKET3_NOP, 0x3FFF),
6804 .nop = PACKET3(PACKET3_NOP, 0x3FFF),
6859 .nop = PACKET3(PACKET3_NOP, 0x3FFF),
6898 .nop = PACKET3(PACKET3_NOP, 0x3FFF),