Lines Matching refs:kiq
891 adev->gfx.kiq.pmf = &gfx_v9_0_kiq_pm4_funcs; in gfx_v9_0_set_kiq_pm4_funcs()
2014 struct amdgpu_kiq *kiq; in gfx_v9_0_sw_init() local
2164 kiq = &adev->gfx.kiq; in gfx_v9_0_sw_init()
2165 r = amdgpu_gfx_kiq_init_ring(adev, &kiq->ring, &kiq->irq); in gfx_v9_0_sw_init()
2206 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq.ring); in gfx_v9_0_sw_fini()
3145 adev->gfx.kiq.ring.sched.ready = false; in gfx_v9_0_cp_compute_enable()
3427 (adev->doorbell_index.kiq * 2) << 2); in gfx_v9_0_kiq_init_register()
3600 ring = &adev->gfx.kiq.ring; in gfx_v9_0_kiq_resume()
3779 soc15_grbm_select(adev, adev->gfx.kiq.ring.me, in gfx_v9_0_hw_fini()
3780 adev->gfx.kiq.ring.pipe, in gfx_v9_0_hw_fini()
3781 adev->gfx.kiq.ring.queue, 0); in gfx_v9_0_hw_fini()
3782 gfx_v9_0_kiq_fini_register(&adev->gfx.kiq.ring); in gfx_v9_0_hw_fini()
3903 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v9_0_kiq_read_clock() local
3904 struct amdgpu_ring *ring = &kiq->ring; in gfx_v9_0_kiq_read_clock()
3908 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v9_0_kiq_read_clock()
3930 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v9_0_kiq_read_clock()
3963 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v9_0_kiq_read_clock()
5345 struct amdgpu_kiq *kiq = &adev->gfx.kiq; in gfx_v9_0_ring_preempt_ib() local
5346 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v9_0_ring_preempt_ib()
5349 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v9_0_ring_preempt_ib()
5352 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v9_0_ring_preempt_ib()
5354 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) { in gfx_v9_0_ring_preempt_ib()
5355 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v9_0_ring_preempt_ib()
5372 kiq->pmf->kiq_unmap_queues(kiq_ring, ring, PREEMPT_QUEUES_NO_UNMAP, in gfx_v9_0_ring_preempt_ib()
5377 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v9_0_ring_preempt_ib()
6928 adev->gfx.kiq.ring.funcs = &gfx_v9_0_ring_funcs_kiq; in gfx_v9_0_set_ring_funcs()