Lines Matching refs:rlc
1088 kfree(adev->gfx.rlc.register_list_format); in gfx_v9_0_free_microcode()
1228 !adev->gfx.rlc.is_rlc_v2_1)) in gfx_v9_0_check_if_need_gfxoff()
1442 if (adev->gfx.rlc.cs_data == NULL) in gfx_v9_0_get_csb_buffer()
1454 for (sect = adev->gfx.rlc.cs_data; sect->section != NULL; ++sect) { in gfx_v9_0_get_csb_buffer()
1635 reg_access_ctrl = &adev->gfx.rlc.reg_access_ctrl; in gfx_v9_0_init_rlcg_reg_access_ctrl()
1643 adev->gfx.rlc.rlcg_reg_access_supported = true; in gfx_v9_0_init_rlcg_reg_access_ctrl()
1651 adev->gfx.rlc.cs_data = gfx9_cs_data; in gfx_v9_0_rlc_init()
1653 cs_data = adev->gfx.rlc.cs_data; in gfx_v9_0_rlc_init()
1664 adev->gfx.rlc.cp_table_size = ALIGN(96 * 5 * 4, 2048) + (64 * 1024); /* JT + GDS */ in gfx_v9_0_rlc_init()
1683 if (adev->gfx.rlc.funcs->update_spm_vmid) in gfx_v9_0_rlc_init()
1684 adev->gfx.rlc.funcs->update_spm_vmid(adev, 0xf); in gfx_v9_0_rlc_init()
2068 if (adev->gfx.rlc.funcs) { in gfx_v9_0_sw_init()
2069 if (adev->gfx.rlc.funcs->init) { in gfx_v9_0_sw_init()
2070 r = adev->gfx.rlc.funcs->init(adev); in gfx_v9_0_sw_init()
2210 amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, in gfx_v9_0_sw_fini()
2211 &adev->gfx.rlc.clear_state_gpu_addr, in gfx_v9_0_sw_fini()
2212 (void **)&adev->gfx.rlc.cs_ptr); in gfx_v9_0_sw_fini()
2214 amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, in gfx_v9_0_sw_fini()
2215 &adev->gfx.rlc.cp_table_gpu_addr, in gfx_v9_0_sw_fini()
2216 (void **)&adev->gfx.rlc.cp_table_ptr); in gfx_v9_0_sw_fini()
2472 adev->gfx.rlc.funcs->get_csb_buffer(adev, adev->gfx.rlc.cs_ptr); in gfx_v9_0_init_csb()
2475 adev->gfx.rlc.clear_state_gpu_addr >> 32); in gfx_v9_0_init_csb()
2477 adev->gfx.rlc.clear_state_gpu_addr & 0xfffffffc); in gfx_v9_0_init_csb()
2479 adev->gfx.rlc.clear_state_size); in gfx_v9_0_init_csb()
2532 kmemdup(adev->gfx.rlc.register_list_format, in gfx_v9_1_init_rlc_save_restore_list()
2533 adev->gfx.rlc.reg_list_format_size_bytes, GFP_KERNEL); in gfx_v9_1_init_rlc_save_restore_list()
2540 adev->gfx.rlc.reg_list_format_direct_reg_list_length, in gfx_v9_1_init_rlc_save_restore_list()
2541 adev->gfx.rlc.reg_list_format_size_bytes >> 2, in gfx_v9_1_init_rlc_save_restore_list()
2556 for (i = 0; i < adev->gfx.rlc.reg_list_size_bytes >> 2; i++) in gfx_v9_1_init_rlc_save_restore_list()
2558 adev->gfx.rlc.register_restore[i]); in gfx_v9_1_init_rlc_save_restore_list()
2562 adev->gfx.rlc.reg_list_format_start); in gfx_v9_1_init_rlc_save_restore_list()
2565 for (i = 0; i < adev->gfx.rlc.reg_list_format_direct_reg_list_length; i++) in gfx_v9_1_init_rlc_save_restore_list()
2570 while (i < (adev->gfx.rlc.reg_list_format_size_bytes >> 2)) { in gfx_v9_1_init_rlc_save_restore_list()
2592 list_size = adev->gfx.rlc.reg_list_size_bytes >> 2; in gfx_v9_1_init_rlc_save_restore_list()
2595 adev->gfx.rlc.reg_restore_list_size); in gfx_v9_1_init_rlc_save_restore_list()
2600 adev->gfx.rlc.starting_offsets_start); in gfx_v9_1_init_rlc_save_restore_list()
2801 if (adev->gfx.rlc.is_rlc_v2_1) { in gfx_v9_0_init_pg()
2815 adev->gfx.rlc.cp_table_gpu_addr >> 8); in gfx_v9_0_init_pg()
2901 adev->gfx.rlc.funcs->stop(adev); in gfx_v9_0_rlc_resume()
2933 adev->gfx.rlc.funcs->start(adev); in gfx_v9_0_rlc_resume()
3736 r = adev->gfx.rlc.funcs->resume(adev); in gfx_v9_0_hw_init()
3796 adev->gfx.rlc.funcs->stop(adev); in gfx_v9_0_hw_fini()
3868 adev->gfx.rlc.funcs->stop(adev); in gfx_v9_0_soft_reset()
6989 adev->gfx.rlc.funcs = &gfx_v9_0_rlc_funcs; in gfx_v9_0_set_rlc_funcs()