Lines Matching refs:gmc
152 adev->gmc.vm_fault.num_types = 1; in gmc_v11_0_set_irq_funcs()
153 adev->gmc.vm_fault.funcs = &gmc_v11_0_irq_funcs; in gmc_v11_0_set_irq_funcs()
156 adev->gmc.ecc_irq.num_types = 1; in gmc_v11_0_set_irq_funcs()
157 adev->gmc.ecc_irq.funcs = &gmc_v11_0_ecc_funcs; in gmc_v11_0_set_irq_funcs()
206 spin_lock(&adev->gmc.invalidate_lock); in gmc_v11_0_flush_vm_hub()
264 spin_unlock(&adev->gmc.invalidate_lock); in gmc_v11_0_flush_vm_hub()
495 adev->gmc.vram_start; in gmc_v11_0_get_vm_pde()
498 if (!adev->gmc.translate_further) in gmc_v11_0_get_vm_pde()
561 adev->gmc.gmc_funcs = &gmc_v11_0_gmc_funcs; in gmc_v11_0_set_gmc_funcs()
641 adev->gmc.shared_aperture_start = 0x2000000000000000ULL; in gmc_v11_0_early_init()
642 adev->gmc.shared_aperture_end = in gmc_v11_0_early_init()
643 adev->gmc.shared_aperture_start + (4ULL << 30) - 1; in gmc_v11_0_early_init()
644 adev->gmc.private_aperture_start = 0x1000000000000000ULL; in gmc_v11_0_early_init()
645 adev->gmc.private_aperture_end = in gmc_v11_0_early_init()
646 adev->gmc.private_aperture_start + (4ULL << 30) - 1; in gmc_v11_0_early_init()
664 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v11_0_late_init()
674 amdgpu_gmc_vram_location(adev, &adev->gmc, base); in gmc_v11_0_vram_gtt_location()
699 adev->gmc.mc_vram_size = in gmc_v11_0_mc_init()
701 adev->gmc.real_vram_size = adev->gmc.mc_vram_size; in gmc_v11_0_mc_init()
708 adev->gmc.aper_base = pci_resource_start(adev->pdev, 0); in gmc_v11_0_mc_init()
709 adev->gmc.aper_size = pci_resource_len(adev->pdev, 0); in gmc_v11_0_mc_init()
713 adev->gmc.aper_base = adev->mmhub.funcs->get_mc_fb_offset(adev); in gmc_v11_0_mc_init()
714 adev->gmc.aper_size = adev->gmc.real_vram_size; in gmc_v11_0_mc_init()
718 adev->gmc.visible_vram_size = adev->gmc.aper_size; in gmc_v11_0_mc_init()
719 if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size) in gmc_v11_0_mc_init()
720 adev->gmc.visible_vram_size = adev->gmc.real_vram_size; in gmc_v11_0_mc_init()
724 adev->gmc.gart_size = 512ULL << 20; in gmc_v11_0_mc_init()
726 adev->gmc.gart_size = (u64)amdgpu_gart_size << 20; in gmc_v11_0_mc_init()
728 gmc_v11_0_vram_gtt_location(adev, &adev->gmc); in gmc_v11_0_mc_init()
761 spin_lock_init(&adev->gmc.invalidate_lock); in gmc_v11_0_sw_init()
765 adev->gmc.vram_width = vram_width; in gmc_v11_0_sw_init()
767 adev->gmc.vram_type = vram_type; in gmc_v11_0_sw_init()
768 adev->gmc.vram_vendor = vram_vendor; in gmc_v11_0_sw_init()
791 &adev->gmc.vm_fault); in gmc_v11_0_sw_init()
798 &adev->gmc.vm_fault); in gmc_v11_0_sw_init()
805 &adev->gmc.ecc_irq); in gmc_v11_0_sw_init()
814 adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ in gmc_v11_0_sw_init()
911 (unsigned)(adev->gmc.gart_size >> 20), in gmc_v11_0_gart_enable()
957 amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0); in gmc_v11_0_hw_fini()
958 amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); in gmc_v11_0_hw_fini()