Lines Matching refs:RREG32
185 blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL); in gmc_v8_0_mc_stop()
203 tmp = RREG32(mmMC_SHARED_BLACKOUT_CNTL); in gmc_v8_0_mc_resume()
252 if (RREG32(mmMC_SEQ_IO_DEBUG_DATA) == 0x05b4dc40) in gmc_v8_0_init_microcode()
313 running = REG_GET_FIELD(RREG32(mmMC_SEQ_SUP_CNTL), MC_SEQ_SUP_CNTL, RUN); in gmc_v8_0_tonga_mc_load_microcode()
336 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v8_0_tonga_mc_load_microcode()
342 if (REG_GET_FIELD(RREG32(mmMC_SEQ_TRAIN_WAKEUP_CNTL), in gmc_v8_0_tonga_mc_load_microcode()
382 data = RREG32(mmMC_SEQ_MISC0); in gmc_v8_0_polaris_mc_load_microcode()
406 data = RREG32(mmMC_SEQ_MISC0); in gmc_v8_0_polaris_mc_load_microcode()
421 base = RREG32(mmMC_VM_FB_LOCATION) & 0xFFFF; in gmc_v8_0_vram_gtt_location()
456 tmp = RREG32(mmVGA_HDP_CONTROL); in gmc_v8_0_mc_program()
461 tmp = RREG32(mmVGA_RENDER_CONTROL); in gmc_v8_0_mc_program()
492 tmp = RREG32(mmHDP_MISC_CNTL); in gmc_v8_0_mc_program()
496 tmp = RREG32(mmHDP_HOST_PATH_CNTL); in gmc_v8_0_mc_program()
519 tmp = RREG32(mmMC_ARB_RAMCFG); in gmc_v8_0_mc_init()
525 tmp = RREG32(mmMC_SHARED_CHMAP); in gmc_v8_0_mc_init()
559 tmp = RREG32(mmCONFIG_MEMSIZE); in gmc_v8_0_mc_init()
579 adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22; in gmc_v8_0_mc_init()
635 tmp = RREG32(mmATC_VMID0_PASID_MAPPING + vmid); in gmc_v8_0_flush_gpu_tlb_pasid()
639 RREG32(mmVM_INVALIDATE_RESPONSE); in gmc_v8_0_flush_gpu_tlb_pasid()
742 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_set_fault_enable_default()
775 tmp = RREG32(mmVM_PRT_CNTL); in gmc_v8_0_set_prt()
842 tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); in gmc_v8_0_gart_enable()
850 tmp = RREG32(mmVM_L2_CNTL); in gmc_v8_0_gart_enable()
859 tmp = RREG32(mmVM_L2_CNTL2); in gmc_v8_0_gart_enable()
865 tmp = RREG32(mmVM_L2_CNTL3); in gmc_v8_0_gart_enable()
871 tmp = RREG32(mmVM_L2_CNTL4); in gmc_v8_0_gart_enable()
892 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v8_0_gart_enable()
922 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_gart_enable()
979 tmp = RREG32(mmMC_VM_MX_L1_TLB_CNTL); in gmc_v8_0_gart_disable()
985 tmp = RREG32(mmVM_L2_CNTL); in gmc_v8_0_gart_disable()
1074 u32 d1vga_control = RREG32(mmD1VGA_CONTROL); in gmc_v8_0_get_vbios_fb_size()
1080 u32 viewport = RREG32(mmVIEWPORT_SIZE); in gmc_v8_0_get_vbios_fb_size()
1105 tmp = RREG32(mmMC_SEQ_MISC0_FIJI); in gmc_v8_0_sw_init()
1107 tmp = RREG32(mmMC_SEQ_MISC0); in gmc_v8_0_sw_init()
1171 u64 tmp = RREG32(mmMC_VM_FB_OFFSET); in gmc_v8_0_sw_init()
1273 u32 tmp = RREG32(mmSRBM_STATUS); in gmc_v8_0_is_idle()
1290 tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__MCB_BUSY_MASK | in gmc_v8_0_wait_for_idle()
1308 u32 tmp = RREG32(mmSRBM_STATUS); in gmc_v8_0_check_soft_reset()
1356 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1360 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1366 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1403 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1407 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1413 tmp = RREG32(mmVM_CONTEXT0_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1417 tmp = RREG32(mmVM_CONTEXT1_CNTL); in gmc_v8_0_vm_fault_interrupt_state()
1441 addr = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_ADDR); in gmc_v8_0_process_interrupt()
1442 status = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_STATUS); in gmc_v8_0_process_interrupt()
1443 mc_client = RREG32(mmVM_CONTEXT1_PROTECTION_FAULT_MCCLIENT); in gmc_v8_0_process_interrupt()
1502 data = RREG32(mmMC_HUB_MISC_HUB_CG); in fiji_update_mc_medium_grain_clock_gating()
1506 data = RREG32(mmMC_HUB_MISC_SIP_CG); in fiji_update_mc_medium_grain_clock_gating()
1510 data = RREG32(mmMC_HUB_MISC_VM_CG); in fiji_update_mc_medium_grain_clock_gating()
1514 data = RREG32(mmMC_XPB_CLK_GAT); in fiji_update_mc_medium_grain_clock_gating()
1518 data = RREG32(mmATC_MISC_CG); in fiji_update_mc_medium_grain_clock_gating()
1522 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_medium_grain_clock_gating()
1526 data = RREG32(mmMC_CITF_MISC_RD_CG); in fiji_update_mc_medium_grain_clock_gating()
1530 data = RREG32(mmMC_CITF_MISC_VM_CG); in fiji_update_mc_medium_grain_clock_gating()
1534 data = RREG32(mmVM_L2_CG); in fiji_update_mc_medium_grain_clock_gating()
1538 data = RREG32(mmMC_HUB_MISC_HUB_CG); in fiji_update_mc_medium_grain_clock_gating()
1542 data = RREG32(mmMC_HUB_MISC_SIP_CG); in fiji_update_mc_medium_grain_clock_gating()
1546 data = RREG32(mmMC_HUB_MISC_VM_CG); in fiji_update_mc_medium_grain_clock_gating()
1550 data = RREG32(mmMC_XPB_CLK_GAT); in fiji_update_mc_medium_grain_clock_gating()
1554 data = RREG32(mmATC_MISC_CG); in fiji_update_mc_medium_grain_clock_gating()
1558 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_medium_grain_clock_gating()
1562 data = RREG32(mmMC_CITF_MISC_RD_CG); in fiji_update_mc_medium_grain_clock_gating()
1566 data = RREG32(mmMC_CITF_MISC_VM_CG); in fiji_update_mc_medium_grain_clock_gating()
1570 data = RREG32(mmVM_L2_CG); in fiji_update_mc_medium_grain_clock_gating()
1582 data = RREG32(mmMC_HUB_MISC_HUB_CG); in fiji_update_mc_light_sleep()
1586 data = RREG32(mmMC_HUB_MISC_SIP_CG); in fiji_update_mc_light_sleep()
1590 data = RREG32(mmMC_HUB_MISC_VM_CG); in fiji_update_mc_light_sleep()
1594 data = RREG32(mmMC_XPB_CLK_GAT); in fiji_update_mc_light_sleep()
1598 data = RREG32(mmATC_MISC_CG); in fiji_update_mc_light_sleep()
1602 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_light_sleep()
1606 data = RREG32(mmMC_CITF_MISC_RD_CG); in fiji_update_mc_light_sleep()
1610 data = RREG32(mmMC_CITF_MISC_VM_CG); in fiji_update_mc_light_sleep()
1614 data = RREG32(mmVM_L2_CG); in fiji_update_mc_light_sleep()
1618 data = RREG32(mmMC_HUB_MISC_HUB_CG); in fiji_update_mc_light_sleep()
1622 data = RREG32(mmMC_HUB_MISC_SIP_CG); in fiji_update_mc_light_sleep()
1626 data = RREG32(mmMC_HUB_MISC_VM_CG); in fiji_update_mc_light_sleep()
1630 data = RREG32(mmMC_XPB_CLK_GAT); in fiji_update_mc_light_sleep()
1634 data = RREG32(mmATC_MISC_CG); in fiji_update_mc_light_sleep()
1638 data = RREG32(mmMC_CITF_MISC_WR_CG); in fiji_update_mc_light_sleep()
1642 data = RREG32(mmMC_CITF_MISC_RD_CG); in fiji_update_mc_light_sleep()
1646 data = RREG32(mmMC_CITF_MISC_VM_CG); in fiji_update_mc_light_sleep()
1650 data = RREG32(mmVM_L2_CG); in fiji_update_mc_light_sleep()
1692 data = RREG32(mmMC_HUB_MISC_HUB_CG); in gmc_v8_0_get_clockgating_state()