Lines Matching refs:gmc
699 adev->gmc.vm_fault.num_types = 1; in gmc_v9_0_set_irq_funcs()
700 adev->gmc.vm_fault.funcs = &gmc_v9_0_irq_funcs; in gmc_v9_0_set_irq_funcs()
703 !adev->gmc.xgmi.connected_to_cpu) { in gmc_v9_0_set_irq_funcs()
704 adev->gmc.ecc_irq.num_types = 1; in gmc_v9_0_set_irq_funcs()
705 adev->gmc.ecc_irq.funcs = &gmc_v9_0_ecc_funcs; in gmc_v9_0_set_irq_funcs()
788 if (adev->gmc.xgmi.num_physical_nodes && in gmc_v9_0_flush_gpu_tlb()
818 spin_lock(&adev->gmc.invalidate_lock); in gmc_v9_0_flush_gpu_tlb()
888 spin_unlock(&adev->gmc.invalidate_lock); in gmc_v9_0_flush_gpu_tlb()
929 bool vega20_xgmi_wa = (adev->gmc.xgmi.num_physical_nodes && in gmc_v9_0_flush_gpu_tlb_pasid()
1113 if (!adev->gmc.translate_further) in gmc_v9_0_get_vm_pde()
1160 adev->gmc.xgmi.connected_to_cpu) in gmc_v9_0_get_coherence_flags()
1277 adev->gmc.gmc_funcs = &gmc_v9_0_gmc_funcs; in gmc_v9_0_set_gmc_funcs()
1311 if (!adev->gmc.xgmi.connected_to_cpu) in gmc_v9_0_set_umc_funcs()
1399 if (!adev->gmc.xgmi.connected_to_cpu) in gmc_v9_0_set_mca_funcs()
1415 adev->gmc.xgmi.supported = true; in gmc_v9_0_early_init()
1418 adev->gmc.xgmi.supported = true; in gmc_v9_0_early_init()
1419 adev->gmc.xgmi.connected_to_cpu = in gmc_v9_0_early_init()
1432 adev->gmc.shared_aperture_start = 0x2000000000000000ULL; in gmc_v9_0_early_init()
1433 adev->gmc.shared_aperture_end = in gmc_v9_0_early_init()
1434 adev->gmc.shared_aperture_start + (4ULL << 30) - 1; in gmc_v9_0_early_init()
1435 adev->gmc.private_aperture_start = 0x1000000000000000ULL; in gmc_v9_0_early_init()
1436 adev->gmc.private_aperture_end = in gmc_v9_0_early_init()
1437 adev->gmc.private_aperture_start + (4ULL << 30) - 1; in gmc_v9_0_early_init()
1482 return amdgpu_irq_get(adev, &adev->gmc.vm_fault, 0); in gmc_v9_0_late_init()
1491 base += adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size; in gmc_v9_0_vram_gtt_location()
1492 if (adev->gmc.xgmi.connected_to_cpu) { in gmc_v9_0_vram_gtt_location()
1504 adev->gmc.xgmi.physical_node_id * adev->gmc.xgmi.node_segment_size; in gmc_v9_0_vram_gtt_location()
1521 adev->gmc.mc_vram_size = in gmc_v9_0_mc_init()
1523 adev->gmc.real_vram_size = adev->gmc.mc_vram_size; in gmc_v9_0_mc_init()
1526 !adev->gmc.xgmi.connected_to_cpu) { in gmc_v9_0_mc_init()
1531 adev->gmc.aper_base = pci_resource_start(adev->pdev, 0); in gmc_v9_0_mc_init()
1532 adev->gmc.aper_size = pci_resource_len(adev->pdev, 0); in gmc_v9_0_mc_init()
1548 (adev->gmc.xgmi.supported && in gmc_v9_0_mc_init()
1549 adev->gmc.xgmi.connected_to_cpu)) { in gmc_v9_0_mc_init()
1550 adev->gmc.aper_base = in gmc_v9_0_mc_init()
1552 adev->gmc.xgmi.physical_node_id * in gmc_v9_0_mc_init()
1553 adev->gmc.xgmi.node_segment_size; in gmc_v9_0_mc_init()
1554 adev->gmc.aper_size = adev->gmc.real_vram_size; in gmc_v9_0_mc_init()
1558 adev->gmc.visible_vram_size = adev->gmc.aper_size; in gmc_v9_0_mc_init()
1569 adev->gmc.gart_size = 512ULL << 20; in gmc_v9_0_mc_init()
1574 adev->gmc.gart_size = 1024ULL << 20; in gmc_v9_0_mc_init()
1578 adev->gmc.gart_size = (u64)amdgpu_gart_size << 20; in gmc_v9_0_mc_init()
1581 adev->gmc.gart_size += adev->pm.smu_prv_buffer_size; in gmc_v9_0_mc_init()
1583 gmc_v9_0_vram_gtt_location(adev, &adev->gmc); in gmc_v9_0_mc_init()
1597 if (adev->gmc.xgmi.connected_to_cpu) { in gmc_v9_0_gart_init()
1598 adev->gmc.vmid0_page_table_depth = 1; in gmc_v9_0_gart_init()
1599 adev->gmc.vmid0_page_table_block_size = 12; in gmc_v9_0_gart_init()
1601 adev->gmc.vmid0_page_table_depth = 0; in gmc_v9_0_gart_init()
1602 adev->gmc.vmid0_page_table_block_size = 0; in gmc_v9_0_gart_init()
1617 if (adev->gmc.xgmi.connected_to_cpu) { in gmc_v9_0_gart_init()
1636 adev->gmc.sdpif_register = RREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0); in gmc_v9_0_save_registers()
1650 spin_lock_init(&adev->gmc.invalidate_lock); in gmc_v9_0_sw_init()
1659 adev->gmc.vram_width = 2048; in gmc_v9_0_sw_init()
1661 adev->gmc.vram_width = vram_width; in gmc_v9_0_sw_init()
1663 if (!adev->gmc.vram_width) { in gmc_v9_0_sw_init()
1674 adev->gmc.vram_width = numchan * chansize; in gmc_v9_0_sw_init()
1678 adev->gmc.vram_type = vram_type; in gmc_v9_0_sw_init()
1679 adev->gmc.vram_vendor = vram_vendor; in gmc_v9_0_sw_init()
1690 adev->gmc.translate_further = in gmc_v9_0_sw_init()
1713 adev->gmc.translate_further = adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
1720 adev->gmc.translate_further = adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
1728 &adev->gmc.vm_fault); in gmc_v9_0_sw_init()
1734 &adev->gmc.vm_fault); in gmc_v9_0_sw_init()
1740 &adev->gmc.vm_fault); in gmc_v9_0_sw_init()
1746 !adev->gmc.xgmi.connected_to_cpu) { in gmc_v9_0_sw_init()
1749 &adev->gmc.ecc_irq); in gmc_v9_0_sw_init()
1758 adev->gmc.mc_mask = 0xffffffffffffULL; /* 48 bit MC */ in gmc_v9_0_sw_init()
1812 amdgpu_bo_free_kernel(&adev->gmc.pdb0_bo, NULL, &adev->gmc.ptr_pdb0); in gmc_v9_0_sw_fini()
1857 WREG32_SOC15(DCE, 0, mmDCHUBBUB_SDPIF_MMIO_CNTRL_0, adev->gmc.sdpif_register); in gmc_v9_0_restore_registers()
1858 WARN_ON(adev->gmc.sdpif_register != in gmc_v9_0_restore_registers()
1872 if (adev->gmc.xgmi.connected_to_cpu) in gmc_v9_0_gart_enable()
1893 (unsigned)(adev->gmc.gart_size >> 20)); in gmc_v9_0_gart_enable()
1894 if (adev->gmc.pdb0_bo) in gmc_v9_0_gart_enable()
1896 (unsigned long long)amdgpu_bo_gpu_offset(adev->gmc.pdb0_bo)); in gmc_v9_0_gart_enable()
1990 amdgpu_irq_put(adev, &adev->gmc.ecc_irq, 0); in gmc_v9_0_hw_fini()
1991 amdgpu_irq_put(adev, &adev->gmc.vm_fault, 0); in gmc_v9_0_hw_fini()