Lines Matching refs:jpeg
63 adev->jpeg.num_jpeg_inst = JPEG25_MAX_HW_INSTANCES_ARCTURUS; in jpeg_v2_5_early_init()
64 for (i = 0; i < adev->jpeg.num_jpeg_inst; i++) { in jpeg_v2_5_early_init()
67 adev->jpeg.harvest_config |= 1 << i; in jpeg_v2_5_early_init()
69 if (adev->jpeg.harvest_config == (AMDGPU_JPEG_HARVEST_JPEG0 | in jpeg_v2_5_early_init()
93 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_sw_init()
94 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_sw_init()
99 VCN_2_0__SRCID__JPEG_DECODE, &adev->jpeg.inst[i].irq); in jpeg_v2_5_sw_init()
105 VCN_2_6__SRCID_DJPEG0_POISON, &adev->jpeg.inst[i].irq); in jpeg_v2_5_sw_init()
111 VCN_2_6__SRCID_EJPEG0_POISON, &adev->jpeg.inst[i].irq); in jpeg_v2_5_sw_init()
124 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_sw_init()
125 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_sw_init()
128 ring = &adev->jpeg.inst[i].ring_dec; in jpeg_v2_5_sw_init()
132 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst[i].irq, in jpeg_v2_5_sw_init()
137 adev->jpeg.internal.jpeg_pitch = mmUVD_JPEG_PITCH_INTERNAL_OFFSET; in jpeg_v2_5_sw_init()
138 adev->jpeg.inst[i].external.jpeg_pitch = SOC15_REG_OFFSET(JPEG, i, mmUVD_JPEG_PITCH); in jpeg_v2_5_sw_init()
177 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_hw_init()
178 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_hw_init()
181 ring = &adev->jpeg.inst[i].ring_dec; in jpeg_v2_5_hw_init()
209 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_hw_fini()
210 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_hw_fini()
213 if (adev->jpeg.cur_state != AMD_PG_STATE_GATE && in jpeg_v2_5_hw_fini()
317 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_start()
318 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_start()
321 ring = &adev->jpeg.inst[i].ring_dec; in jpeg_v2_5_start()
371 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_stop()
372 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_stop()
482 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_is_idle()
483 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_is_idle()
499 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_wait_for_idle()
500 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_wait_for_idle()
520 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_set_clockgating_state()
521 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_set_clockgating_state()
542 if(state == adev->jpeg.cur_state) in jpeg_v2_5_set_powergating_state()
551 adev->jpeg.cur_state = state; in jpeg_v2_5_set_powergating_state()
586 amdgpu_fence_process(&adev->jpeg.inst[ip_instance].ring_dec); in jpeg_v2_5_process_interrupt()
705 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_set_dec_ring_funcs()
706 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_set_dec_ring_funcs()
709 adev->jpeg.inst[i].ring_dec.funcs = &jpeg_v2_5_dec_ring_vm_funcs; in jpeg_v2_5_set_dec_ring_funcs()
711 adev->jpeg.inst[i].ring_dec.funcs = &jpeg_v2_6_dec_ring_vm_funcs; in jpeg_v2_5_set_dec_ring_funcs()
712 adev->jpeg.inst[i].ring_dec.me = i; in jpeg_v2_5_set_dec_ring_funcs()
726 for (i = 0; i < adev->jpeg.num_jpeg_inst; ++i) { in jpeg_v2_5_set_irq_funcs()
727 if (adev->jpeg.harvest_config & (1 << i)) in jpeg_v2_5_set_irq_funcs()
730 adev->jpeg.inst[i].irq.num_types = 1; in jpeg_v2_5_set_irq_funcs()
731 adev->jpeg.inst[i].irq.funcs = &jpeg_v2_5_irq_funcs; in jpeg_v2_5_set_irq_funcs()
782 for (inst = 0; inst < adev->jpeg.num_jpeg_inst; inst++) in jpeg_v2_6_query_ras_poison_status()
804 adev->jpeg.ras = &jpeg_v2_6_ras; in jpeg_v2_5_set_ras_funcs()