Lines Matching refs:jpeg
56 adev->jpeg.num_jpeg_inst = 1; in jpeg_v4_0_early_init()
80 VCN_4_0__SRCID__JPEG_DECODE, &adev->jpeg.inst->irq); in jpeg_v4_0_sw_init()
86 VCN_4_0__SRCID_DJPEG0_POISON, &adev->jpeg.inst->irq); in jpeg_v4_0_sw_init()
92 VCN_4_0__SRCID_EJPEG0_POISON, &adev->jpeg.inst->irq); in jpeg_v4_0_sw_init()
104 ring = &adev->jpeg.inst->ring_dec; in jpeg_v4_0_sw_init()
108 r = amdgpu_ring_init(adev, ring, 512, &adev->jpeg.inst->irq, 0, in jpeg_v4_0_sw_init()
113 adev->jpeg.internal.jpeg_pitch = regUVD_JPEG_PITCH_INTERNAL_OFFSET; in jpeg_v4_0_sw_init()
114 adev->jpeg.inst->external.jpeg_pitch = SOC15_REG_OFFSET(JPEG, 0, regUVD_JPEG_PITCH); in jpeg_v4_0_sw_init()
149 struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec; in jpeg_v4_0_hw_init()
181 if (adev->jpeg.cur_state != AMD_PG_STATE_GATE && in jpeg_v4_0_hw_fini()
185 amdgpu_irq_put(adev, &adev->jpeg.inst->irq, 0); in jpeg_v4_0_hw_fini()
346 struct amdgpu_ring *ring = &adev->jpeg.inst->ring_dec; in jpeg_v4_0_start()
512 if (state == adev->jpeg.cur_state) in jpeg_v4_0_set_powergating_state()
521 adev->jpeg.cur_state = state; in jpeg_v4_0_set_powergating_state()
542 amdgpu_fence_process(&adev->jpeg.inst->ring_dec); in jpeg_v4_0_process_interrupt()
609 adev->jpeg.inst->ring_dec.funcs = &jpeg_v4_0_dec_ring_vm_funcs; in jpeg_v4_0_set_dec_ring_funcs()
620 adev->jpeg.inst->irq.num_types = 1; in jpeg_v4_0_set_irq_funcs()
621 adev->jpeg.inst->irq.funcs = &jpeg_v4_0_irq_funcs; in jpeg_v4_0_set_irq_funcs()
661 for (inst = 0; inst < adev->jpeg.num_jpeg_inst; inst++) in jpeg_v4_0_query_ras_poison_status()
683 adev->jpeg.ras = &jpeg_v4_0_ras; in jpeg_v4_0_set_ras_funcs()