Lines Matching refs:ib
422 struct amdgpu_ib *ib, in sdma_v3_0_ring_emit_ib() argument
433 amdgpu_ring_write(ring, lower_32_bits(ib->gpu_addr) & 0xffffffe0); in sdma_v3_0_ring_emit_ib()
434 amdgpu_ring_write(ring, upper_32_bits(ib->gpu_addr)); in sdma_v3_0_ring_emit_ib()
435 amdgpu_ring_write(ring, ib->length_dw); in sdma_v3_0_ring_emit_ib()
865 struct amdgpu_ib ib; in sdma_v3_0_ring_test_ib() local
879 memset(&ib, 0, sizeof(ib)); in sdma_v3_0_ring_test_ib()
881 AMDGPU_IB_POOL_DIRECT, &ib); in sdma_v3_0_ring_test_ib()
885 ib.ptr[0] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v3_0_ring_test_ib()
887 ib.ptr[1] = lower_32_bits(gpu_addr); in sdma_v3_0_ring_test_ib()
888 ib.ptr[2] = upper_32_bits(gpu_addr); in sdma_v3_0_ring_test_ib()
889 ib.ptr[3] = SDMA_PKT_WRITE_UNTILED_DW_3_COUNT(1); in sdma_v3_0_ring_test_ib()
890 ib.ptr[4] = 0xDEADBEEF; in sdma_v3_0_ring_test_ib()
891 ib.ptr[5] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v3_0_ring_test_ib()
892 ib.ptr[6] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v3_0_ring_test_ib()
893 ib.ptr[7] = SDMA_PKT_NOP_HEADER_OP(SDMA_OP_NOP); in sdma_v3_0_ring_test_ib()
894 ib.length_dw = 8; in sdma_v3_0_ring_test_ib()
896 r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f); in sdma_v3_0_ring_test_ib()
913 amdgpu_ib_free(adev, &ib, NULL); in sdma_v3_0_ring_test_ib()
930 static void sdma_v3_0_vm_copy_pte(struct amdgpu_ib *ib, in sdma_v3_0_vm_copy_pte() argument
936 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v3_0_vm_copy_pte()
938 ib->ptr[ib->length_dw++] = bytes; in sdma_v3_0_vm_copy_pte()
939 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v3_0_vm_copy_pte()
940 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v3_0_vm_copy_pte()
941 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v3_0_vm_copy_pte()
942 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v3_0_vm_copy_pte()
943 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v3_0_vm_copy_pte()
957 static void sdma_v3_0_vm_write_pte(struct amdgpu_ib *ib, uint64_t pe, in sdma_v3_0_vm_write_pte() argument
963 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v3_0_vm_write_pte()
965 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v3_0_vm_write_pte()
966 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v3_0_vm_write_pte()
967 ib->ptr[ib->length_dw++] = ndw; in sdma_v3_0_vm_write_pte()
969 ib->ptr[ib->length_dw++] = lower_32_bits(value); in sdma_v3_0_vm_write_pte()
970 ib->ptr[ib->length_dw++] = upper_32_bits(value); in sdma_v3_0_vm_write_pte()
987 static void sdma_v3_0_vm_set_pte_pde(struct amdgpu_ib *ib, uint64_t pe, in sdma_v3_0_vm_set_pte_pde() argument
992 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_GEN_PTEPDE); in sdma_v3_0_vm_set_pte_pde()
993 ib->ptr[ib->length_dw++] = lower_32_bits(pe); /* dst addr */ in sdma_v3_0_vm_set_pte_pde()
994 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v3_0_vm_set_pte_pde()
995 ib->ptr[ib->length_dw++] = lower_32_bits(flags); /* mask */ in sdma_v3_0_vm_set_pte_pde()
996 ib->ptr[ib->length_dw++] = upper_32_bits(flags); in sdma_v3_0_vm_set_pte_pde()
997 ib->ptr[ib->length_dw++] = lower_32_bits(addr); /* value */ in sdma_v3_0_vm_set_pte_pde()
998 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in sdma_v3_0_vm_set_pte_pde()
999 ib->ptr[ib->length_dw++] = incr; /* increment size */ in sdma_v3_0_vm_set_pte_pde()
1000 ib->ptr[ib->length_dw++] = 0; in sdma_v3_0_vm_set_pte_pde()
1001 ib->ptr[ib->length_dw++] = count; /* number of entries */ in sdma_v3_0_vm_set_pte_pde()
1011 static void sdma_v3_0_ring_pad_ib(struct amdgpu_ring *ring, struct amdgpu_ib *ib) in sdma_v3_0_ring_pad_ib() argument
1017 pad_count = (-ib->length_dw) & 7; in sdma_v3_0_ring_pad_ib()
1020 ib->ptr[ib->length_dw++] = in sdma_v3_0_ring_pad_ib()
1024 ib->ptr[ib->length_dw++] = in sdma_v3_0_ring_pad_ib()
1633 static void sdma_v3_0_emit_copy_buffer(struct amdgpu_ib *ib, in sdma_v3_0_emit_copy_buffer() argument
1639 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v3_0_emit_copy_buffer()
1641 ib->ptr[ib->length_dw++] = byte_count; in sdma_v3_0_emit_copy_buffer()
1642 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v3_0_emit_copy_buffer()
1643 ib->ptr[ib->length_dw++] = lower_32_bits(src_offset); in sdma_v3_0_emit_copy_buffer()
1644 ib->ptr[ib->length_dw++] = upper_32_bits(src_offset); in sdma_v3_0_emit_copy_buffer()
1645 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v3_0_emit_copy_buffer()
1646 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v3_0_emit_copy_buffer()
1659 static void sdma_v3_0_emit_fill_buffer(struct amdgpu_ib *ib, in sdma_v3_0_emit_fill_buffer() argument
1664 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_CONST_FILL); in sdma_v3_0_emit_fill_buffer()
1665 ib->ptr[ib->length_dw++] = lower_32_bits(dst_offset); in sdma_v3_0_emit_fill_buffer()
1666 ib->ptr[ib->length_dw++] = upper_32_bits(dst_offset); in sdma_v3_0_emit_fill_buffer()
1667 ib->ptr[ib->length_dw++] = src_data; in sdma_v3_0_emit_fill_buffer()
1668 ib->ptr[ib->length_dw++] = byte_count; in sdma_v3_0_emit_fill_buffer()