Lines Matching refs:sdma
254 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v3_0_free_microcode()
255 amdgpu_ucode_release(&adev->sdma.instance[i].fw); in sdma_v3_0_free_microcode()
306 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_init_microcode()
311 err = amdgpu_ucode_request(adev, &adev->sdma.instance[i].fw, fw_name); in sdma_v3_0_init_microcode()
314 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v3_0_init_microcode()
315 adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); in sdma_v3_0_init_microcode()
316 adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); in sdma_v3_0_init_microcode()
317 if (adev->sdma.instance[i].feature_version >= 20) in sdma_v3_0_init_microcode()
318 adev->sdma.instance[i].burst_nop = true; in sdma_v3_0_init_microcode()
322 info->fw = adev->sdma.instance[i].fw; in sdma_v3_0_init_microcode()
331 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v3_0_init_microcode()
332 amdgpu_ucode_release(&adev->sdma.instance[i].fw); in sdma_v3_0_init_microcode()
399 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v3_0_ring_insert_nop() local
403 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v3_0_ring_insert_nop()
518 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_stop()
577 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_ctx_switch_enable()
619 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_enable()
646 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_resume()
647 ring = &adev->sdma.instance[i].ring; in sdma_v3_0_gfx_resume()
746 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_gfx_resume()
747 ring = &adev->sdma.instance[i].ring; in sdma_v3_0_gfx_resume()
1013 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in sdma_v3_0_ring_pad_ib() local
1019 if (sdma && sdma->burst_nop && (i == 0)) in sdma_v3_0_ring_pad_ib()
1095 adev->sdma.num_instances = 1; in sdma_v3_0_early_init()
1098 adev->sdma.num_instances = SDMA_MAX_INSTANCE; in sdma_v3_0_early_init()
1118 &adev->sdma.trap_irq); in sdma_v3_0_sw_init()
1124 &adev->sdma.illegal_inst_irq); in sdma_v3_0_sw_init()
1130 &adev->sdma.illegal_inst_irq); in sdma_v3_0_sw_init()
1140 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_sw_init()
1141 ring = &adev->sdma.instance[i].ring; in sdma_v3_0_sw_init()
1151 r = amdgpu_ring_init(adev, ring, 1024, &adev->sdma.trap_irq, in sdma_v3_0_sw_init()
1167 for (i = 0; i < adev->sdma.num_instances; i++) in sdma_v3_0_sw_fini()
1168 amdgpu_ring_fini(&adev->sdma.instance[i].ring); in sdma_v3_0_sw_fini()
1254 adev->sdma.srbm_soft_reset = srbm_soft_reset; in sdma_v3_0_check_soft_reset()
1257 adev->sdma.srbm_soft_reset = 0; in sdma_v3_0_check_soft_reset()
1267 if (!adev->sdma.srbm_soft_reset) in sdma_v3_0_pre_soft_reset()
1270 srbm_soft_reset = adev->sdma.srbm_soft_reset; in sdma_v3_0_pre_soft_reset()
1286 if (!adev->sdma.srbm_soft_reset) in sdma_v3_0_post_soft_reset()
1289 srbm_soft_reset = adev->sdma.srbm_soft_reset; in sdma_v3_0_post_soft_reset()
1306 if (!adev->sdma.srbm_soft_reset) in sdma_v3_0_soft_reset()
1309 srbm_soft_reset = adev->sdma.srbm_soft_reset; in sdma_v3_0_soft_reset()
1390 amdgpu_fence_process(&adev->sdma.instance[0].ring); in sdma_v3_0_process_trap_irq()
1403 amdgpu_fence_process(&adev->sdma.instance[1].ring); in sdma_v3_0_process_trap_irq()
1428 drm_sched_fault(&adev->sdma.instance[instance_id].ring.sched); in sdma_v3_0_process_illegal_inst_irq()
1440 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_update_sdma_medium_grain_clock_gating()
1454 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_update_sdma_medium_grain_clock_gating()
1479 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1487 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_update_sdma_medium_grain_light_sleep()
1598 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_set_ring_funcs()
1599 adev->sdma.instance[i].ring.funcs = &sdma_v3_0_ring_funcs; in sdma_v3_0_set_ring_funcs()
1600 adev->sdma.instance[i].ring.me = i; in sdma_v3_0_set_ring_funcs()
1615 adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_LAST; in sdma_v3_0_set_irq_funcs()
1616 adev->sdma.trap_irq.funcs = &sdma_v3_0_trap_irq_funcs; in sdma_v3_0_set_irq_funcs()
1617 adev->sdma.illegal_inst_irq.funcs = &sdma_v3_0_illegal_inst_irq_funcs; in sdma_v3_0_set_irq_funcs()
1684 adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring; in sdma_v3_0_set_buffer_funcs()
1700 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_set_vm_pte_funcs()
1702 &adev->sdma.instance[i].ring.sched; in sdma_v3_0_set_vm_pte_funcs()
1704 adev->vm_manager.vm_pte_num_scheds = adev->sdma.num_instances; in sdma_v3_0_set_vm_pte_funcs()